summaryrefslogtreecommitdiff
path: root/src/soc
AgeCommit message (Expand)Author
2015-10-11Do not show HAVE_MTC on non-tegra210Vladimir Serbinenko
2015-10-07cbfs: add struct cbfsfAaron Durbin
2015-10-05Add EM100 'hyper term' spi console support in ramstage & smmMartin Roth
2015-10-04drivers/uart/Kconfig: Select 8250 mem when 8250 mem32 is enabledAlexandru Gagniuc
2015-10-02tegra124: use the common verstage flowAaron Durbin
2015-10-02broadcom/cygnus: remove verstage.cAaron Durbin
2015-10-01tegra132/tegra210: remove verstage.cAaron Durbin
2015-10-01intel/fsp_baytrail: Remove unused MICROCODE_INCLUDE_PATH from KconfigWerner Zeh
2015-09-30vboot: provide a unified flow for separate verstageAaron Durbin
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-09-29skylake: select HAVE_INTEL_FIRMWAREAaron Durbin
2015-09-29intel: auto include intel/common/firmwareAaron Durbin
2015-09-28skylake: Work around issue in ACPI interpreterDuncan Laurie
2015-09-28skylake: ACPI: Remove Configurable TDP support codeDuncan Laurie
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-23chromeos: vboot and chromeos dependency removal for sw write protect statePaul Kocialkowski
2015-09-22linking: link bootblock.elf with .data and .bss sections againAaron Durbin
2015-09-22coreboot: introduce commonlibAaron Durbin
2015-09-17broadwell: Switch to using common ACPI _SWS codeDuncan Laurie
2015-09-17braswell: Switch to using common ACPI _SWS codeDuncan Laurie
2015-09-17skylake: Use common ACPI _SWS codeDuncan Laurie
2015-09-17Skylake: update C state latency and power numbersrobbie zhang
2015-09-17t210: lp0_resume: Configure unused SDMMC1/3 pads for low power leakageYen Lin
2015-09-17intel/skylake: Create "RtcLock" Silicon UPD from corebootBarnali Sarkar
2015-09-17intel/common: Add common code for filling out ACPI _SWSDuncan Laurie
2015-09-16Move final Intel chipsets with ME to intel/common/firmwareMartin Roth
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
2015-09-10intel/skylake: HAVE_UART_MEMORY_MAPPED doesn't exist anymorePatrick Georgi
2015-09-10skylake: Move ACPI init to SOC instead of mainboardDuncan Laurie
2015-09-10intel/common: Print board ID if enabledDuncan Laurie
2015-09-10skylake: Enable DPTF based on devicetree settingDuncan Laurie
2015-09-10Skylake: Print GPIO MMIO base and pad config using gpio_debug tokenSubrata Banik
2015-09-09skylake: dptf: Add TSR3 thermal sensor and CPU code cleanupDuncan Laurie
2015-09-09braswell: acpi: Allow DPTF thresholds to be defined at board-levelShawn Nematbakhsh
2015-09-09intel/skylake: ACPI: Clean up formatting in and fix ASL codeDuncan Laurie
2015-09-09verstage: use common program.ld for linkingAaron Durbin
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-08rk3288: Allow board-specific APLL (CPU clock) settingsDavid Hendricks
2015-09-08skylake: igd: clean up igd.cDuncan Laurie
2015-09-08braswell: Tristate CFIO 139 and CFIO 140Ravi Sarawadi
2015-09-08Skylake:Set DISB inside romstage after mrc initDhaval Sharma
2015-09-08skylake: Clean up chip.hDuncan Laurie
2015-09-08skylake: Apply USB2 and USB3 port enable/disable settingsDuncan Laurie
2015-09-08skylake: Remove dead codeLee Leahy
2015-09-08skylake: refactor flash_controller codeAaron Durbin
2015-09-08skylake: move flash_controller.h to the proper placeAaron Durbin
2015-09-08skylake: fix eventlog on resume pathAaron Durbin
2015-09-08skylake: allow timer_monotonic_get() in all stagesAaron Durbin
2015-09-08skylake: ACPI: Clean up GPIO controllerDuncan Laurie
2015-09-08skylake: ACPI: Clean up and fix XHCI ACPI DeviceDuncan Laurie
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-10 17:30:06 +0000