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path: root/src/soc
AgeCommit message (Expand)Author
2014-12-31ipq8064: modify SPI controller driver to work in corebootVadim Bendebury
2014-12-31ipq8064/storm: UART enable and various fixesVadim Bendebury
2014-12-31baytrail: add more gpio init macrosKane Chen
2014-12-30ipq8064: copy u-boot spi driver as isVadim Bendebury
2014-12-30tegra: i2c: Add a timeout to I2C bit clear recovery mechanismJulius Werner
2014-12-30i2c: Add software_i2c driver for I2C debugging and emulationJulius Werner
2014-12-30tegra124: Active dc/sor register change immediatelyVince Hsu
2014-12-30tegra124: display clock should be initialized before any accessVince Hsu
2014-12-30ipq8064: prepare uart driver for use in corebootVadim Bendebury
2014-12-30ipq8064: prepare include files before adding UART driverVadim Bendebury
2014-12-30ipq8064: SOC UART driver belongs in the SOC directoryVadim Bendebury
2014-12-30ipq8064: make timer services availableMarc Jones
2014-12-30ipq/arm: Redesign hooks for bootblockVadim Bendebury
2014-12-30baytrail: Add defines and functions for GPNCOREKein Yuan
2014-12-28intel baytrail broadwell: Include microcode updatesKyösti Mälkki
2014-12-27samsung/exynos*/Makefile.inc: Simplify unnecessary ifeqEdward O'Callaghan
2014-12-26tegra124: Add a utility function to read the cause of the most recent reset.Gabe Black
2014-12-26nyan*: I2C: Implement bus clear when 'ARB_LOST' error occursTom Warren
2014-12-26soc/samsung/exynos5250/clk.h: Trivial, fix spelling in commentsEdward O'Callaghan
2014-12-26soc/samsung/exynos5250/clock.c: Trivial whitespace fixesEdward O'Callaghan
2014-12-26soc/samsung/exynos: Sync 'power.c' between chip variantsEdward O'Callaghan
2014-12-25soc/samsung/exynos: Make 'ps_hold_setup()' staticEdward O'Callaghan
2014-12-19nyan*: Add fast link training functionsJimmy Zhang
2014-12-19fsp_baytrail: Initialize LPC pads in bootblock for port 80Martin Roth
2014-12-19fsp_baytrail: Remove GPIO_NC1 #defineMartin Roth
2014-12-19baytrail SOCs: Add missing comma in gpio.hMartin Roth
2014-12-17baytrail: initialize backlight PWM frequencyAaron Durbin
2014-12-17x86: Initialize SPI controller explicitly during PCH initDavid Hendricks
2014-12-17tegra124: modify panel init sequenceKen Chang
2014-12-17nyan*: enable CLAMP_INPUTSKen Chang
2014-12-17fsp_baytrail: Add code to read GPIOs in romstageMartin Roth
2014-12-17ARM: Use LPAE for Virtual Address TranslationDaisuke Nojiri
2014-12-17tegra124: change PLLD VCO calculation algorithmKen Chang
2014-12-16tegra124: Allow "best" PLLD parameters for unmatched pixel clock.Hung-Te Lin
2014-12-16tegra124: Always enable DC when attaching SOR.Hung-Te Lin
2014-12-16nyan*: debug: Add sor registers dump functionJimmy Zhang
2014-12-16tegra124: clock: Enforce PLL constraints for VCO and CFJulius Werner
2014-12-16nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 registerJimmy Zhang
2014-12-16nyan*: merge a couple of sor setting difference from kernel driverJimmy Zhang
2014-12-16nyan*: Apply sor fix from kernel dc driverJimmy Zhang
2014-12-16tegra124: Initialize display panel by EDID.Hung-Te Lin
2014-12-16CBMEM console: Fix boards with BROKEN_CAR_MIGRATEKyösti Mälkki
2014-12-16Intel FSP: Move to DYNAMIC_CBMEMKyösti Mälkki
2014-12-16i2c: Replace the i2c API.Gabe Black
2014-12-15tegra124: set MOT bit for I2C-over-AUXKen Chang
2014-12-15tegra124: Setup clock PLLD by approximating display panel pixel clock.Hung-Te Lin
2014-12-15tegra124: Release DMA channel at end of transactionDavid Hendricks
2014-12-15tegra124: Use correct mask for APB bus widthDavid Hendricks
2014-12-15nyan: Enable the cbmem console on nyan and allocate space for it in SRAM.Gabe Black
2014-12-15tegra124: More improvements to the clock initialization macros.Gabe Black
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