summaryrefslogtreecommitdiff
path: root/src/soc
AgeCommit message (Expand)Author
2015-07-09t210: i2c6: enable SOR_SAFE and DPAUX1 clocks for i2c6 to workYen Lin
2015-07-08Braswell: Fix error in the warranty statementLee Leahy
2015-07-08memlayout: Add timestamp regions for t210 and cygnusStefan Reinauer
2015-07-07marvel/bg4cd: move timestamp init to SoC codePatrick Georgi
2015-07-07rk3288: Use timestamp region for pre-cbmem timestampsFurquan Shaikh
2015-07-07t132: Add timestamp collection support in t132Furquan Shaikh
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-07-07T210: UTMIP: Correct UTMIP PLL programming as per Mark KuoTom Warren
2015-07-06Braswell: Update to end of June.Lee Leahy
2015-07-06Braswell: Update the ACPI tablesLee Leahy
2015-07-06veyron*: Kill SKIP_DISPLAY_INIT_HACKDavid Hendricks
2015-07-06t210: MTC cleanupFurquan Shaikh
2015-07-06rk3288: Add VOP_MODE_NONE for headless devicesDavid Hendricks
2015-07-06rk3288: Auto-detect display.David Hendricks
2015-07-06rockchip: rk3288: correct ddr 300MHz clock settinghuang lin
2015-07-04Kconfig: Fix references to obsolete symbolsMartin Roth
2015-07-03Kconfig whitespace cleanup: Change leading spaces to tabsMartin Roth
2015-07-02tegra124: verified boot fixupsStefan Reinauer
2015-07-02Move baytrail & fsp_baytrail to the common IFD interface.Martin Roth
2015-07-01tegra132: adjust vboot2 memlayout to make coreboot compileStefan Reinauer
2015-07-01nvidia/tegra210: Drop unused Kconfig symbolPatrick Georgi
2015-07-01rockchip/rk3288: Initialize CPU in bootblockPatrick Georgi
2015-07-01tegra210: Include correct include filesStefan Reinauer
2015-06-30nvidia/tegra210: reserve more room for the romstage in vboot buildsPatrick Georgi
2015-06-30nvidia/tegra210: add new SoCPatrick Georgi
2015-06-30qualcomm/ipq806x: Fix uart in verstagePatrick Georgi
2015-06-30qualcomm/ipq806x: centralize vboot configurationPatrick Georgi
2015-06-30t210: Set UTMIP_PCOUNT_UPDN_DIV to 0Stephen Barber
2015-06-26rockchip/rk3288: complete vboot configuration and move to SoCPatrick Georgi
2015-06-26soc/intel/common: Restrict common romstage/ramstage code to FSPLee Leahy
2015-06-25Braswell: Remove copyright addressLee Leahy
2015-06-25Braswell: Add Braswell SOC supportLee Leahy
2015-06-25soc/intel/common/Kconfig: Fix warning & whitespaceMartin Roth
2015-06-24Intel/common: Remove copyright addressLee Leahy
2015-06-24Intel Common SOC: Add romstage supportLee Leahy
2015-06-24Remove address from GPLv2 headersPatrick Georgi
2015-06-24Kconfig: Get rid of obsolete symbolsMartin Roth
2015-06-23nvidia/tegra: expose more registersTom Warren
2015-06-23tegra: Move pinmux enum constants from tegra/pinmux.h to soc-specific pinmux.hFurquan Shaikh
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-06-23intel/broadwell: Fix refcode handlingPatrick Georgi
2015-06-23broadwell: fix typoPatrick Georgi
2015-06-23rockchip/rk3288: add support for hdmi displayYakir Yang
2015-06-22Remove incorrect Kconfig expressionsMartin Roth
2015-06-21Remove obsolete EARLY_CONSOLE usageMartin Roth
2015-06-21Remove old HAVE_UART_MEMORY_MAPPED select statementsMartin Roth
2015-06-12pistachio: add DDR3 initialization codeIonela Voinescu
2015-06-12pistachio: Use passive windowing as DQS gating schemeIonela Voinescu
2015-06-10pistachio: sort included header filesIonela Voinescu
2015-06-10pistachio: initialize cbmem area to be emptyIonela Voinescu