coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2018-10-02	soc/intel/skylake: Fix spelling mistake	Subrata Banik
2018-10-02	soc/intel/skylake: Replace white space with tab	Subrata Banik
2018-10-01	amd/stoneyridge: Add USB ASL for D0/D3cold	Marshall Dawson
2018-10-01	amd/stoneyridge: Add ASL helper for AOAC PwrGood Control	Marshall Dawson
2018-10-01	amd/stoneyridge: Add FCH WAK and PTS methods	Marshall Dawson
2018-10-01	amd/stoneyridge: Add ASL for D-states on AOAC devices	Marshall Dawson
2018-10-01	amd/stoneyridge: Add ACPI MMIO and PCI offsets to ASL	Marshall Dawson
2018-10-01	amd/stoneyridge: Load AOAC and USB gnvs values	Marshall Dawson
2018-10-01	amd/stoneyridge: Add USB settings to gnvs	Marshall Dawson
2018-10-01	amd/stoneyridge: Create gnvs entries for AOAC devices	Marshall Dawson
2018-10-01	soc/intel/fsp_broadwell_de: Fix IA32_MC0_* names	Elyes HAOUAS
2018-09-30	soc/cavium/cn81xx/spi: Add function to return SPI clock	Patrick Rudolph
2018-09-28	amd/stoneyridge: Make gnvs ASL whitespace consistent	Marshall Dawson
2018-09-28	soc/amd/stoneyridge/BiosCallOuts: Remove #include <AmdLib.h>	Richard Spiegel
2018-09-28	soc/intel/cannonlake: Fix ACPI FADT table generation	Duncan Laurie
2018-09-28	soc/intel/cannonlake: Move SkipMpInit config to FSPM	Lijian Zhao
2018-09-28	soc/amd/common/block/pi: Remove references to AmdLib	Richard Spiegel
2018-09-28	soc/intel/cannonlake: Add ACPI entry for LAN	Lijian Zhao
2018-09-28	soc/intel/cannonlake: Update UPD from device switch	Lijian Zhao
2018-09-28	src/*: normalize Google copyright headers	Patrick Georgi
2018-09-26	soc/sifive/fu540: Document #if ENV_ROMSTAGE line	Jonathan Neuschäfer
2018-09-26	soc/sifive/fu540: Remove PLL parameters from sdram.c	Jonathan Neuschäfer
2018-09-26	mb/lowrisc: Remove the Nexys4DDR port	Jonathan Neuschäfer
2018-09-26	soc/intel/common/block: Don't use device_t	Elyes HAOUAS
2018-09-24	amd/common/psp: Remove use of PspBaseLib	Charles Marslett
2018-09-24	soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific	Richard Spiegel
2018-09-22	skylake,kabylake: Add support to set eMMC tuning param from dev tree	Pratik Prajapati
2018-09-21	soc/intel/denverton_ns/csme_ie_kt.c: Don't use device_t	Elyes HAOUAS
2018-09-21	soc/intel/braswell/ramstage.c: Add SoC stepping D-1 support	Frans Hendriks
2018-09-21	soc/intel/quark/uart.c: Don't use device_t	Elyes HAOUAS
2018-09-21	soc/intel/skylake: Don't use device_t	Elyes HAOUAS
2018-09-21	soc/broadwell: Don't use device_t	Elyes HAOUAS
2018-09-21	soc/intel/skylake: Include some microcode blobs	Arthur Heymans
2018-09-21	soc/intel/cannonlake: Correct ITSS port id.	praveen hodagatta pranesh
2018-09-20	soc/intel/cannonlake: Remove const for spd_smbus_address	Lijian Zhao
2018-09-20	soc/amd/stoneyridge/romstage.c: Remove obsolete comment	Richard Spiegel
2018-09-20	soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources	Werner Zeh
2018-09-20	fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device	Werner Zeh
2018-09-19	amd/stoneyridge: Sync PSP base to MSR	Marshall Dawson
2018-09-18	soc/intel/common/block: Don't use device_t in ramstage	Elyes HAOUAS
2018-09-18	soc/cavium/cn81xx: Don't use device_t in ramstage	Elyes HAOUAS
2018-09-18	cpu/*/car: fix ancient URL explaining XIP range run-time calculation	Stefan Tauner
2018-09-17	mb/google/kahlee/variants/baseboard: Set STAPM percentage	Richard Spiegel
2018-09-17	soc/intel/broadwell: Add PCH_GPIO_PIRQ_INVERT definition	Matt DeVillier
2018-09-15	sifive/hifive-unleashed: enable CBMEM support	Philipp Hug
2018-09-15	soc/sifive: move ram_resource to mainboard	Philipp Hug
2018-09-14	soc/intel/denverton_ns: Enable common block PMC	Julien Viard de Galbert
2018-09-14	soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation	Philipp Hug
2018-09-14	soc/sifive/fu540: Initialize SDRAM	Philipp Hug
2018-09-14	soc/sifive/fu540: Switch clock to 1GHz in romstage	Philipp Hug