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coreboot
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broadwell_refcode
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Some coreboot project code with my work
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Author
2018-10-14
soc/amd/stoneyridge: Define PM USB Enable register
Marshall Dawson
2018-10-14
soc/amd/stoneyridge: Remove hudson EHCI debug controllers
Marshall Dawson
2018-10-14
soc/amd/stoneyridge: Remove errant parenthesis in southbridge.h
Marshall Dawson
2018-10-14
soc/amd/stoneyridge: Rearrange southbridge.h more
Marshall Dawson
2018-10-12
drivers/intel/fsp2_0: Hook up IntelFSP repo
Patrick Georgi
2018-10-12
amd/stoneyridge: Fix PmControl register size in SMI handler
Marshall Dawson
2018-10-12
amd/stoneyridge: Rename CGPLL_CONFIG definitions
Marshall Dawson
2018-10-12
amd/stoneyridge: Rename GppClkCntrl fields
Marshall Dawson
2018-10-12
amd/stoneyridge: Rearrange southbridge.h
Marshall Dawson
2018-10-12
amd/stoneyridge: Remove dead GPIO definitions
Marshall Dawson
2018-10-12
amd/stoneyridge: Clarify XHCI_PM register definitions
Marshall Dawson
2018-10-12
amd/stoneyridge: Fix SPI_CMD_TRIGGER coding style
Marshall Dawson
2018-10-12
amd/stoneyridge: Convert hex definitions to lower case
Marshall Dawson
2018-10-12
amd/stoneyridge: Remove hudson register definitions
Marshall Dawson
2018-10-11
src: Move common IA-32 MSRs to <cpu/x86/msr.h>
Elyes HAOUAS
2018-10-11
src: Replace MSR addresses with macros
Elyes HAOUAS
2018-10-11
amd/stoneyridge: Indicate STAPM units in their name
Richard Spiegel
2018-10-11
selfboot: remove bounce buffers
Ronald G. Minnich
2018-10-11
tegra124_lp0: make sure to build with compiler.h included
Patrick Georgi
2018-10-11
soc/intel/common/block/gpio: check for NULL using if statement
Bora Guvendik
2018-10-10
soc/intel/skylake: Set PCIEXPWAK_DIS if WAKE# pin is not enabled
Furquan Shaikh
2018-10-10
soc/cavium: dynamic UART initialization for cavium cn8100
Jens Drenhaus
2018-10-10
soc/amd/stoneyridge/gpio.c: Create I2C slave reset code
Richard Spiegel
2018-10-10
mediatek/mt8183: Init PLLs for DRAM
Tristan Shieh
2018-10-09
soc/intel/cannonlake: Add PCIE ASL entry
Subrata Banik
2018-10-09
soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices
Subrata Banik
2018-10-09
soc/intel/common/acpi: Fix ACPI Namespace lookup failure, AE_ALREADY_EXISTS i...
Subrata Banik
2018-10-09
soc/intel/common/block/pcr: Add NULL pointer check in pcr_execute_sideband_msg()
Subrata Banik
2018-10-09
soc/intel/cannonlake: Disable Legacy PME for Root ports
Subrata Banik
2018-10-09
soc/intel/cannonlake: Ensure FSP don't override ITSS IPCx registers
Subrata Banik
2018-10-09
soc/intel/skylake: Ensure FSP don't override ITSS IPCx registers
Subrata Banik
2018-10-09
soc/intel/common/pch: Select Kconfig for ITSS polarity configuration
Subrata Banik
2018-10-08
Move compiler.h to commonlib
Nico Huber
2018-10-08
soc/intel/skylake: Fix ‘dev’ pointer NULL before being dereferenced
Subrata Banik
2018-10-08
smmstore: Add a key/val store facility in flash, mediated through SMM
Patrick Georgi
2018-10-08
src: Use tabs for indentation
Elyes HAOUAS
2018-10-06
soc/intel/common, mb/google, mb/siemens: Use lower case x for RXD
Furquan Shaikh
2018-10-06
soc/intel/common/block/hda: Enable static scanning of devices under HDA
Furquan Shaikh
2018-10-06
soc/intel/.../hda: Add and use config for initialization of HDA codecs
Furquan Shaikh
2018-10-05
soc/intel/skylake: check for NULL with if condition
Pratik Prajapati
2018-10-05
src: Fix MSR_PKG_CST_CONFIG_CONTROL register name
Elyes HAOUAS
2018-10-05
amd/stoneyridge: Comment PCI and AcpiMmio registers in ASL
Marshall Dawson
2018-10-05
amd/stoneyridge: Remove unused registers from ASL
Marshall Dawson
2018-10-05
amd/stoneyridge: Remove SATA D0 on suspend
Marshall Dawson
2018-10-04
soc/intel/cannonlake: Move the FSP related callbacks to separate files
Rizwan Qureshi
2018-10-04
soc/nvidia/tegra124: Increase bootblock size
Patrick Rudolph
2018-10-04
soc/intel/common: add acpi_get_sleep_type to pmclib
Bora Guvendik
2018-10-04
amd/stoneyridge: Use BIOS_DEBUG to log PM1 and PMxC0 status
Edward Hill
2018-10-04
amd/stoneyridge: Prepare for vboot rebooting system
Marshall Dawson
2018-10-04
src/soc/intel/cannonlake: Fix IA32_PLATFORM_DCA_CAP address
Elyes HAOUAS
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