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AgeCommit message (Expand)Author
2018-04-19soc/amd/common/block/pi/heapmanager.c: Simplify codeRichard Spiegel
2018-04-19soc/intel/cannonlake: Set DISB after Dram initLijian Zhao
2018-04-19soc/intel/apollolake: fix 'DENSITY' misspellingAaron Durbin
2018-04-19soc/intel/cannonlake: Force LPC IO decode settingsLijian Zhao
2018-04-18soc/amd/stoneyridge/include/soc/gpio.h: Remove vendor code referenceRichard Spiegel
2018-04-17soc/intel/apollolake: Implement _PS0/_PS3 methods for PCIe root portsVenkateswarlu Vinjamuri
2018-04-17soc/intel/apollolake: Configure PCIe root port #3 for GLK WiFiVenkateswarlu Vinjamuri
2018-04-17soc/intel/apollolake: Configure PCIe root port #1 for APL WiFiVenkateswarlu Vinjamuri
2018-04-17soc/intel/skylake: check DPTF_TSR0_ACTIVE_AC* in _ACx methodsFrank Wu
2018-04-16soc/amd/stoneyridge/northbridge.c: Fix bit definitionsRichard Spiegel
2018-04-16soc/amd/stoneyridge/lpc.c: Fix bit definitionsRichard Spiegel
2018-04-16soc/intel/skylake: Hook up libgfxinitNico Huber
2018-04-16intel/fsp_broadwell_de: Set FSP serial speed to match coreboot'sDavid Hendricks
2018-04-16soc/intel/apollolake: Fix CPU address bitsHannah Williams
2018-04-16soc/intel/apollolake: update cache options for glkAaron Durbin
2018-04-16intel/fsp_broadwell_de: Remove buggy code for SMBus clock gatingWerner Zeh
2018-04-13soc/amd/stoneyridge: add a romstage hook for mainboardsMartin Roth
2018-04-12include/memory_info.h: Change serial number field from 5 bytes to 4Raul E Rangel
2018-04-11soc/amd: Fix generating SMBIOS Type 17Raul E Rangel
2018-04-11src/amd/stoneyridge: Fix a typo (EDGEL_TRIG -> EDGE_TRIG)Jonathan Neuschäfer
2018-04-11amd/stoneyridge: Reorder temp mtrr for flashMarshall Dawson
2018-04-11soc/intel/common/block/cpu: Fix cpu_get_power_maxMario Scheithauer
2018-04-11soc/intel/common/block/gspi: Set Clock Update Bit for clock updates.Shamile Khan
2018-04-11Correct "MTTR" to "MTRR"Jonathan Neuschäfer
2018-04-11soc/intel: Remove superfluous pointers variablesArthur Heymans
2018-04-11soc/intel/common: Configure all possible GFX DSM memory reserve rangeSubrata Banik
2018-04-10soc/intel/apollolake: fix SPI input clock speedAaron Durbin
2018-04-10soc/intel/cannonlake: Set Cannonlake I2C clockLijian Zhao
2018-04-10soc/intel/common: prepare for lpss clock splitAaron Durbin
2018-04-10soc/amd/stoneyridege: Create AP jump structureRichard Spiegel
2018-04-10soc/amd: Add "halt this AP" callback to romstageRichard Spiegel
2018-04-09soc/intel/apollolake: Fix GPIO group to GPE mapping for GLKHannah Williams
2018-04-09soc/intel/apollolake: enable MONITOR/MWAIT for GLKCole Nelson
2018-04-09soc/intel/common: Add funtion to modify PAT & NXE bitNaresh G Solanki
2018-04-09amd/stoneyridge: Add GNB IOAPIC initMarc Jones
2018-04-09soc/intel/{apl,glk}: Move flush_l1d_to_l2 function to common locationNaresh G Solanki
2018-04-06fsp_broadwell_de: Provide valid address and size for DCACHE rangeWerner Zeh
2018-04-06fsp_broadwell_de: Provide valid ACPI path names for domain and LPCWerner Zeh
2018-04-06amd/common/block/pi: Make agesa_heap_base() staticMarshall Dawson
2018-04-06amd/stoneyridge: Use defined value for SPI flash MTRRMarshall Dawson
2018-04-05soc/intel/cannonlake: Add VT-d and VMX programmingLijian Zhao
2018-04-05soc/intel/cannonlake: Clear EMMC timeout when boot source is not EMMCBora Guvendik
2018-04-05mb/amd/gardenia/gpio.c: Convert GPIO to new formatRichard Spiegel
2018-04-05soc/qualcomm/sdm845: Add MMU supportT Michael Turney
2018-04-05soc/qualcomm/sdm845: remove hole in memlayout.ldT Michael Turney
2018-04-05soc/intel/skylake: Generate ACPI DMAR tableNico Huber
2018-04-05soc/intel/skylake: Enable VT-d and X2APICNico Huber
2018-04-03spi: Add helper functions for bit-bangingJulius Werner
2018-04-03rockchip: Add gpio_set() functionJulius Werner
2018-04-02src/soc/stoneyridge: Add a check for CMOS failureMartin Roth