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path: root/src/soc
AgeCommit message (Expand)Author
2020-07-02soc/amd/common: fix SPI bar resource usageAaron Durbin
2020-07-01soc/intel/tigerlake: Switch to CSE Lite RW at BS_DEV_INIT_CHIPS entryJamie Ryu
2020-07-01soc/intel/cannonlake: make satahotplug user configurable via devicetreeJonas Loeffelholz
2020-07-01soc/intel/common/cpu: Don't set any TCC settings if offset is 0Tim Wawrzynczak
2020-07-01soc/intel/skylake: Update ASL syntax in xhci.aslEdward O'Callaghan
2020-07-01soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4John Zhao
2020-07-01ACPI GNVS: Replace uses of smm_get_gnvs()Kyösti Mälkki
2020-06-30soc/amd/common/gpio: Clear interrupt and wake status when configuring padsFurquan Shaikh
2020-06-30soc/amd/common/gpio: Add new helper macro PAD_CFG_STRUCT_FLAGSFurquan Shaikh
2020-06-30soc/amd/gpio, mb/{amd,google}: Configure pads using a single entry in GPIO co...Furquan Shaikh
2020-06-30soc/amd/common/gpio: Use gpio_setbits32()Furquan Shaikh
2020-06-30soc/amd/common/gpio: Add macros for setting fields of soc_amd_gpioFurquan Shaikh
2020-06-30soc/amd/common/lpc: Skip SERIRQ setup when using eSPIMarshall Dawson
2020-06-30soc/amd/common/gpio: Rename GPIO debounce macrosFurquan Shaikh
2020-06-30soc/amd/common/gpio: Update the macros for interrupt and pad filteringFurquan Shaikh
2020-06-30soc/amd/common/gpio: Make macro names for GPIO flags consistentFurquan Shaikh
2020-06-30soc/intel/cannonlake: Add UWES ASL into xhci.aslEdward O'Callaghan
2020-06-30jasperlake: enable tcc_offset functionalitySumeet R Pawnikar
2020-06-30tigerlake: enable tcc_offset functionalitySumeet R Pawnikar
2020-06-30soc/amd/common/gpio: Drop unused macro GPIO_TRIGGER_INVALIDFurquan Shaikh
2020-06-30ACPI: Drop typedef global_nvs_tKyösti Mälkki
2020-06-30soc/intel/tigerlake: Add CpuReplacementCheck to chip optionsJamie Ryu
2020-06-30soc/intel/tigerlake: Avoid NULL pointer dereferenceJohn Zhao
2020-06-30src: Remove whitespaces before tabsElyes HAOUAS
2020-06-29soc/amd/picasso: add NULL-pointer check to root_complex_fill_ssdtFelix Held
2020-06-29soc/amd/picasso/soc_util: add comment on the silicon and soc typesFelix Held
2020-06-29soc/amd/common: Refactor GPIO SCI/SMI interruptsKyösti Mälkki
2020-06-29soc/amd/common: Refactor GPIO_MASTER_SWITCH interrupt enableKyösti Mälkki
2020-06-29soc/amd/common: Drop ACPIMMIO GPIO bank separationKyösti Mälkki
2020-06-29soc/intel/tigerlake: Run pmc_set_acpi_mode() during .init in pmc_opsWilliam Wei
2020-06-28vendorcode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww24 release and adapt socJonathan Zhang
2020-06-28soc/amd/common: Allow runtime mapping of ACPIMMIO banksKyösti Mälkki
2020-06-28soc/amd/common: Access ACPIMMIO via proper symbolsKyösti Mälkki
2020-06-28soc/intel/common: add TCC activation functionalitySumeet R Pawnikar
2020-06-28soc/xeon_sp/cpx: Define MSR PPIN related registersJohnny Lin
2020-06-28soc/amd/picasso/soc_util: rework reduced I/O chip detectionFelix Held
2020-06-27soc/intel/broadwell: Use common early SPI codeAngel Pons
2020-06-26soc/rockchip: Use (Q) instead of @Stefan Reinauer
2020-06-25Revert "soc/amd/common/block/acpimmio: Update acpimmio for psp_verstage"Kyösti Mälkki
2020-06-25soc/intel/cannonlake: Add PchPmPwrCycDur to chip optionsSridhar Siricilla
2020-06-25drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1Jonathan Zhang
2020-06-25soc/intel/xeon_sp: use edk2-stable202005 headersJonathan Zhang
2020-06-25soc/intel/xeon_sp/cpx: display UPDs and CPX-SP specific HOBsJonathan Zhang
2020-06-25soc/intel/cannonlake: Add missing USB_PORT_WAKE_ENABLE defineEdward O'Callaghan
2020-06-24soc/amd/picasso: fix host bridge bus numbersAaron Durbin
2020-06-24soc/amd/picasso: Add UPD xhci0_force_gen1Chris Wang
2020-06-24soc/intel/tigerlake: Fix unresolved symbol CDW1 errorJohn Zhao
2020-06-24soc/intel/broadwell/adsp: Fix 8-bit write on PCI_INTERRUPT_LINE registerElyes HAOUAS
2020-06-24src: Report byte-sized access for GPE0Angel Pons
2020-06-24soc/amd/stoneyridge: Correct ACPI CPU string prefixMatt DeVillier