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AgeCommit message (Expand)Author
2018-09-15sifive/hifive-unleashed: enable CBMEM supportPhilipp Hug
2018-09-15soc/sifive: move ram_resource to mainboardPhilipp Hug
2018-09-14soc/intel/denverton_ns: Enable common block PMCJulien Viard de Galbert
2018-09-14soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculationPhilipp Hug
2018-09-14soc/sifive/fu540: Initialize SDRAMPhilipp Hug
2018-09-14soc/sifive/fu540: Switch clock to 1GHz in romstagePhilipp Hug
2018-09-14soc/sifive/fu540: create ram_resource with actual memory sizePhilipp Hug
2018-09-14arch/riscv: provide a monotonic timerPhilipp Hug
2018-09-14soc/sifive/fu540: add SiFive supplied header files for SDRAM initializationPhilipp Hug
2018-09-14complier.h: add __always_inline and use it in code baseAaron Durbin
2018-09-13soc/sifive/fu540: Get SDRAM controller out of resetPhilipp Hug
2018-09-13soc/sifive/fu540: Update clock settings according SiFive bootloaderPhilipp Hug
2018-09-13uart/sifive: make divisor configurablePhilipp Hug
2018-09-13src/*/intel/: clarify Kconfig options regarding IFDStefan Tauner
2018-09-12soc/sifive/fu540: Initialize PLL and clockPhilipp Hug
2018-09-12soc/amd/stoneyridge: Fix more GPIO functionsJonathan Neuschäfer
2018-09-11amd/stoneyridge: Enable BERT table generationMarshall Dawson
2018-09-11amd/stoneyridge: Set BERT region size when no TSEG usedMarshall Dawson
2018-09-11soc/intel/baytrail: Remove trailing space in log messagePaul Menzel
2018-09-10soc/sifive: fix compiler warningPhilipp Hug
2018-09-10soc/sifive/fu540: Makefile: include mtime_init in ramstagePhilipp Hug
2018-09-10soc/sifive/fu540: Add driver for OTP memoryPhilipp Hug
2018-09-10soc/intel/cannonlake: Correct number of root ports for CNL PCH HMaulik V Vaghela
2018-09-10soc/sifive/fu540: add CLINT supportXiang Wang
2018-09-10riscv: update mtime initializationXiang Wang
2018-09-10complier.h: add __noreturn and use it in code baseAaron Durbin
2018-09-10soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetreeShaunak Saha
2018-09-07amd/stoneyridge: Construct ACPI BERT tableMarshall Dawson
2018-09-07amd/stoneyridge: Construct BERT region from machine checkMarshall Dawson
2018-09-07amd/stoneyridge: Create an MCA structureMarshall Dawson
2018-09-07amd/stoneyridge: Relocate MCA error identificationMarshall Dawson
2018-09-07amd/stoneyridge: Adjust memory map for reservedMarshall Dawson
2018-09-07fsp_broadwell_de: enable spi consoleOkash Khawaja
2018-09-06soc/intel/cannonlake: Fix Coverity Scan reportLijian Zhao
2018-09-06mediatek: Refactor memory test code among similar SoCsTristan Shieh
2018-09-06soc/intel/common: Add function to set BILD bit in RTCRizwan Qureshi
2018-09-06chromeos/gnvs: remove function and naming cleanupJoel Kitching
2018-09-02riscv: separately define stack locations at different stagesXiang Wang
2018-08-31siemens/mc_apl1: Correct the Tx signal from SATA interfaceMario Scheithauer
2018-08-30soc/intel/cannonlake: Fix comment errors for SMBUSLijian Zhao
2018-08-30soc/amd/stoneyridge/enable_usbdebug.c: Update pci_ehci_dbg_set_port()Richard Spiegel
2018-08-30soc/intel/cannonlake: Update PMC base address for CNP H and LPMaulik V Vaghela
2018-08-28soc/intel/cannonlake: Change LPDDR4 to MEMCFGLijian Zhao
2018-08-28siemens/mc_apl1: Extend circuit life by clock gating and power gatingMario Scheithauer
2018-08-27intel: Use common HPET table revision functionMarc Jones
2018-08-27update all FADT version 3.0 to use the get tables functionMarc Jones
2018-08-24soc/intel/apollolake: Make eMMC max speed configurableMario Scheithauer
2018-08-24soc/cn81xx: Add vboot supportPhilipp Deppenwiese
2018-08-24soc/cavium/cn81xx: Don't directly manipulate devicetree dataPatrick Rudolph
2018-08-24device_tree/fit: Constify data structuresPatrick Rudolph