coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-04-02	soc/intel/broadwell: add ACPI backlight support	Matt DeVillier
2020-04-02	Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`	Nico Huber
2020-04-02	soc/intel/tigerlake: Add macros and SPD information for DDR4	Furquan Shaikh
2020-04-02	soc/intel/tigerlake: Reorganize memory initialization support	Furquan Shaikh
2020-04-02	soc/amd/common/psp: Move definitions into a private file	Marshall Dawson
2020-04-02	soc/amd/common/psp: Move early init to soc	Felix Held
2020-04-02	soc/amd/common/psp: Consolidate FW blob load functions	Marshall Dawson
2020-04-02	soc/amd/common/psp: Make common function to print status	Marshall Dawson
2020-04-01	soc/intel/tigerlake: Remove Jasper Lake SoC references	Aamir Bohra
2020-04-01	soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoC	Aamir Bohra
2020-03-31	soc/intel/common/block: Add missing include	Rizwan Qureshi
2020-03-31	security/vboot: relocate and rename vboot_platform_is_resuming()	Bill XIE
2020-03-31	soc/intel/common/block/cse: Add check for CSE enabled	Wim Vervoorn
2020-03-31	security/vboot: Decouple measured boot from verified boot	Bill XIE
2020-03-30	intel/fsp2_0: Make FSP_USE_REPO a SoC opt-in	Johanna Schander
2020-03-30	soc/intel/{icelake, tigerlake}: Remove DDI A lane programming	Ronak Kanabar
2020-03-30	soc/amd/picasso: Add helper functions for finding SOC type	Martin Roth
2020-03-30	soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATION_3	Brandon Breitenstein
2020-03-29	soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2	Martin Roth
2020-03-29	soc/amd/picasso: Add Kconfig option for chip footprint	Felix Held
2020-03-28	soc/intel/skylake: Hook up GMA ACPI brightness controls	Matt DeVillier
2020-03-28	soc/intel/common: Hook up GMA ACPI brightness controls	Matt DeVillier
2020-03-28	soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake	Aamir Bohra
2020-03-28	soc/intel/jasperlake: Add Jasper Lake SoC support	Aamir Bohra
2020-03-26	soc/intel/xeon_sp: Add basic Cooperlake-SP support	Andrey Petrov
2020-03-26	soc/intel/xeon_sp: Configure P2SB BAR in bootblock	Andrey Petrov
2020-03-26	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	Andrey Petrov
2020-03-25	create stdio.h and stdarg.h for {,v}snprintf	Joel Kitching
2020-03-25	amd/common/acpi: move thermal zone to common location	Michał Żygowski
2020-03-25	soc/intel/cometlake: Use IntelFSP repo	Felix Singer
2020-03-25	acpi: correct the processor devices scope	Michał Żygowski
2020-03-25	soc/intel/xeon_sp: Enable LPC generic IO decode range	Johnny Lin
2020-03-25	soc/intel/tigerlake: Configure Hyperthreading	Wonkyu Kim
2020-03-24	intel/broadwell: Correct backlight-PWM divider	Nico Huber
2020-03-23	soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZE	Tim Wawrzynczak
2020-03-23	acpi: Change Processor ACPI Name (Intel only)	Christian Walter
2020-03-23	soc/intel/braswell: Clean up	Angel Pons
2020-03-23	soc/intel/cfl/vr_config: Add 8-core desktop CPU support	Patrick Rudolph
2020-03-23	src: capitalize 'APIC'	Elyes HAOUAS
2020-03-21	soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition proper	Subrata Banik
2020-03-20	soc/intel: Enable GPIO functions in verstage	Bora Guvendik
2020-03-20	soc/intel/denverton_ns: Implement AES-NI Lock	Julien Viard de Galbert
2020-03-20	soc/intel/tigerlake: Enable ACPI support for PMC core OS driver	Venkata Krishna Nimmagadda
2020-03-20	soc/intel/common: Add ACPI support for PMC core OS driver	Venkata Krishna Nimmagadda
2020-03-19	soc/intel/xeon_sp: Modify FSP-T code caching parameters	Johnny Lin
2020-03-19	soc/intel/tigerlake: add support to read SPD data from SMBus	Ronak Kanabar
2020-03-19	soc/intel/tigerlake: Update header to avoid compilation issue	Maulik V Vaghela
2020-03-18	soc/amd/picasso: Add CPUID of newer device	Marshall Dawson
2020-03-18	soc/intel/tigerlake: Correct number of gpio group for Jasper Lake	Maulik V Vaghela
2020-03-18	soc/intel/tigerlake: Update FSP UPDs to turn on USB4/TBT	Brandon Breitenstein