summaryrefslogtreecommitdiff
path: root/src/soc
AgeCommit message (Expand)Author
2014-12-09spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.Gabe Black
2014-12-09spi: Remove the spi_set_speed and spi_cs_is_valid functions.Gabe Black
2014-12-09spi: Factor EC protocol details out of the SPI drivers.Gabe Black
2014-12-09UCB RISCV: Switch to DYNAMIC_CBMEMKyösti Mälkki
2014-12-09fsp platfoms: add prototype & consolidate main entry-pointMartin Roth
2014-12-08intel/baytrail: Spelling fixesMartin Roth
2014-12-08intel/fsp_baytrail: Spelling fixesMartin Roth
2014-12-08samsung/exynos5420: Spelling FixesMartin Roth
2014-12-08intel/broadwell: Spelling fixesMartin Roth
2014-12-06soc/qualcomm/ipq806x/Kconfig: Fix indent styleEdward O'Callaghan
2014-12-05fsp_baytrail: Update function disable codeMartin Roth
2014-12-05fsp_baytrail: Kconfig update for Gold 3 FSPMartin Roth
2014-12-05fsp_baytrail: Update microcode for Gold 3 FSP releaseMartin Roth
2014-12-05FSP platform microcode: Update to remove Kconfig variableMartin Roth
2014-12-05ipq8064: Make clock code build in corebootVadim Bendebury
2014-12-05ipq8064: prepare UART driver for use in corebootVadim Bendebury
2014-12-05fsp_baytrail: remove register option for TSEG sizeMartin Roth
2014-12-05fsp_baytrail: update printk to use FSP_INFO_LEVELMartin Roth
2014-12-05fsp_baytrail: update for UPD_DEVICE_CHECK macroMartin Roth
2014-12-05fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macroMartin Roth
2014-12-05fsp_baytrail: update for UPD_SPD_CHECK macroMartin Roth
2014-12-05fsp_baytrail: update to add the UPD_DEFAULT_CHECK macroMartin Roth
2014-12-02Replace hlt with halt()Patrick Georgi
2014-12-01Add UCB RISCV support for architecture, soc, and emulation mainboard..Ronald G. Minnich
2014-12-01Mark non-executable files non-executablePatrick Georgi
2014-11-30Replace hlt() loops with halt()Patrick Georgi
2014-11-28ACPI: Remove CBMEM TOC from GNVSKyösti Mälkki
2014-11-25intel: Remove IRQ1 from possible PIRQ assignemnt.Vladimir Serbinenko
2014-11-24intel/fsp_baytrail: add new CPUID for Baytrail I step D0Herve ELter
2014-11-21intel/fsp_baytrail: add Gold3 FSP supportYork Yang
2014-11-20Replace includes of build.h with version.hKyösti Mälkki
2014-11-19broadwell: move to per-device ACPI.Vladimir Serbinenko
2014-11-19fsp_baytrail: Fix ACPI 'Object is not referenced' warningsMartin Roth
2014-11-19fsp_baytrail: Update chip.h UPD entries to match names in fspvpd.hMartin Roth
2014-11-18tegra124: remove spurious error messagePatrick Georgi
2014-11-18tegra124: actually parse is_lvdsPatrick Georgi
2014-11-18baytrail: fix range checkPatrick Georgi
2014-11-14tegra124: allow tegra124 devices to run vboot rmoduleAaron Durbin
2014-11-14tegra124: i2c: Reset the controller when there's an error.Gabe Black
2014-11-14tegra124: fix the dangerous VPR write orderJoseph Lo
2014-11-14tegra124: Add some functions for resetting peripherals.Gabe Black
2014-11-14t124: Clean up display init functionsJimmy Zhang
2014-11-13intel: use crosscompiler readelf, instead of globalPatrick Georgi
2014-11-13arm: Put assembly functions into separate sectionsJulius Werner
2014-11-13ipq8064: Make timer code compileVadim Bendebury
2014-11-13ipq8064: Configure proper bootblock stack and load addressVadim Bendebury
2014-11-13Use sbl blobs from a private locationVadim Bendebury
2014-11-13ipq806x: Add support for GPIO operationsFurquan Shaikh
2014-11-13tegra124: Add a macro specifically for configuring the I2C controller clocks.Gabe Black
2014-11-13tegra124: Fix some bugs in the clock configuration macros.Gabe Black
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-23 13:18:18 +0000