coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-10-30	soc/intel/broadwell: Move PCH code into pch subdir	Angel Pons
2020-10-30	soc/intel/broadwell: Separate PCH in devicetree	Angel Pons
2020-10-30	Revert "broadwell: update processor power limits configuration"	Angel Pons
2020-10-30	soc/intel/broadwell/cpu.c: Re-add `configure_thermal_target`	Angel Pons
2020-10-29	soc/intel/xeon_sp: Move function debug macros	Marc Jones
2020-10-29	include/device/device.h: Move resource debug macros	Marc Jones
2020-10-29	mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'	Subrata Banik
2020-10-29	soc/mediatek/mt8192: Do dram full calibration	Huayang Duan
2020-10-28	soc/intel: deduplicate ACPI timer emulation	Michael Niewöhner
2020-10-28	soc/amd/picasso/acpi: Include platform.asl	Josie Nordrum
2020-10-28	soc/amd/common/acpi: Create platform.asl to define acpi transitions	Josie Nordrum
2020-10-28	src/soc/intel/xeon_sp: Fill in the cache information in SMBIOS type 7	Morgan Jang
2020-10-28	soc/intel/xeon_sp/cpx: Set SLEEP_BUTTON flag in ACPI FADT	Morgan Jang
2020-10-28	mb/ocp/deltalake: Rename motherboard_fill_fadt()	Jingle Hsu
2020-10-26	soc/amd/picasso/acpi: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-10-26	Revert "soc/intel/jasperlake: Allow mainboard to override chip configuration"	Karthikeyan Ramasubramanian
2020-10-26	soc/intel/icl: enable common CPU code	Michael Niewöhner
2020-10-26	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner
2020-10-26	soc/intel/skl: replace conditional on dt option reading CPUID for CPPC	Michael Niewöhner
2020-10-26	soc/intel: drop unneeded ISST configuration code	Michael Niewöhner
2020-10-26	soc/intel/common/block/smbus: Add define for I2C_EN	Patrick Rudolph
2020-10-26	soc/intel/common/block/smbus: Add Cannonpoint PCH-H PCI ID	Patrick Rudolph
2020-10-26	src: Include <arch/io.h> when appropriate	Elyes HAOUAS
2020-10-26	soc/mediatek/mt8192: update descriptions for dram config	Xi Chen
2020-10-26	soc/intel/xeon_sp/acpi: Add pch.asl	Marc Jones
2020-10-25	soc/intel/broadwell: Merge `chip.c` into `systemagent.c`	Angel Pons
2020-10-25	soc/intel/broadwell: Drop `broadwell_pci_ops`	Angel Pons
2020-10-25	soc/intel/alderlake/romstage: Skip GPIO configuration from FSP	Subrata Banik
2020-10-24	soc/intel/broadwell/gma.c: Align `igd_setup_panel` with Haswell	Angel Pons
2020-10-24	soc/intel/broadwell: Use get_{pmbase,gpiobase}	Angel Pons
2020-10-24	{cpu,soc}/intel: deduplicate cpu code	Michael Niewöhner
2020-10-23	soc/intel/broadwell: Add ECC config reporting	Angel Pons
2020-10-23	soc/intel/broadwell: Remove unnecessary array	Angel Pons
2020-10-23	soc/intel/broadwell: Fix copy-pasted copy-paste error	Angel Pons
2020-10-23	soc/intel/broadwell: Align raminit-related code with Haswell	Angel Pons
2020-10-23	soc/intel/broadwell: Relocate `report_memory_config` function	Angel Pons
2020-10-23	soc/intel/broadwell/romstage/pch.c: Drop reg-script usage	Angel Pons
2020-10-23	soc/intel/broadwell/romstage/romstage.c: Clean up includes	Angel Pons
2020-10-23	soc/intel/tigerlake: Add Acoustic features	Shaunak Saha
2020-10-23	soc/intel/broadwell: Move `fill_postcar_frame` to memmap.c	Angel Pons
2020-10-23	soc/intel/broadwell: Drop reg-script usage from bootblock PCH init	Angel Pons
2020-10-23	soc/intel/broadwell: Define RCBA register LCAP	Angel Pons
2020-10-23	soc/intel/broadwell/finalize.c: Use register names	Angel Pons
2020-10-23	soc/intel/broadwell: Sort SA registers in ascending order	Angel Pons
2020-10-23	soc/intel/broadwell: Drop reg-script to finalize SA	Angel Pons
2020-10-23	soc/intel/broadwell: Revise SA lockdown sequence	Angel Pons
2020-10-23	haswell/broadwell: Fix typos of `BCLK`	Angel Pons
2020-10-23	soc/intel/broadwell/memmap.c: Use `SA_DEV_ROOT` macro	Angel Pons
2020-10-23	soc/intel/broadwell: Use common early SMBus code	Angel Pons
2020-10-23	soc/intel/broadwell/lpc.c: Drop reg-script usage for PCH misc init	Angel Pons