coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-10-19	soc/intel/cnl: lock AES-NI feature if selected	Michael Niewöhner
2020-10-19	soc/amd/picasso: Skip SmmInfo to PSP on S3 resume	Marshall Dawson
2020-10-19	soc/amd/picasso: Fix typo in SMU argument base	Marshall Dawson
2020-10-19	soc/rockchip/rk3288/include/soc/display.h: Add missing includes	Elyes HAOUAS
2020-10-19	soc/rockchip/rk3288/gpio.c: Use GPIOx_BASE macros	Elyes HAOUAS
2020-10-19	src/soc/samsung: Move common headers to "common/include/soc"	Elyes HAOUAS
2020-10-19	soc/intel/*: drop useless XTAL shutdown qualification code	Michael Niewöhner
2020-10-19	Revert "soc/intel/cannonlake: Enable ACPI timer emulation if PM timer is disa...	Michael Niewöhner
2020-10-19	soc/intel/skylake: Do not let FSP set the subsystem IDs	Benjamin Doron
2020-10-19	soc/intel/cannonlake: Fix memory corruptions	John Zhao
2020-10-19	soc/intel/common/acpi: correct indentation	Michael Niewöhner
2020-10-19	soc/amd/common/acpi: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-10-19	amd/picasso/verstage: replace rsa accel with modexp	Kangheui Won
2020-10-19	soc/intel/tigerlake: Reflow long lines	Sridhar Siricilla
2020-10-19	soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb	Marc Jones
2020-10-17	cpu/intel,soc/intel: drop Kconfig for hyperthreading	Michael Niewöhner
2020-10-17	intel/txt: Add `txt_get_chipset_dpr` function	Angel Pons
2020-10-17	trogdor/sc7180: Clarify USE_QC_BLOBS requirements	Julius Werner
2020-10-16	include/cpu/x86: introduce new helper for (un)setting MSRs	Michael Niewöhner
2020-10-16	soc/intel/skylake: Rename PcieRpAspm devicetree config	Benjamin Doron
2020-10-15	soc/intel/xeon_sp: Add get_system_memory_map()	Marc Jones
2020-10-15	soc/intel/skylake: Configure L1 substates for PCH root ports	Benjamin Doron
2020-10-14	soc/intel/skylake/cpu.c: Fix comment coding style	Angel Pons
2020-10-14	soc/intel/jasperlake: Enable CAR NEM enhanced mode	Aamir Bohra
2020-10-14	soc/intel/broadwell/xhci.c: Align with Lynx Point	Angel Pons
2020-10-14	soc/intel/broadwell/smi.c: Drop unused functions	Angel Pons
2020-10-14	soc/intel/broadwell/pcie.c: Add some null checks	Angel Pons
2020-10-14	soc/intel/broadwell: Align cosmetics with Haswell/Lynx Point	Angel Pons
2020-10-14	soc/intel/broadwell/igd.c: Rename to gma.c	Angel Pons
2020-10-14	soc/intel/common/block: Enable PMC IPC driver	Brandon Breitenstein
2020-10-14	soc/intel/alderlake: Enable TME for Alder Lake	Subrata Banik
2020-10-14	soc/intel/tigerlake: Enable and use USB4 PCIe driver	Duncan Laurie
2020-10-14	soc/intel/common: Add SSDT generation for Intel USB4 PCIe ports	Duncan Laurie
2020-10-14	soc/intel/common/block: Add common support for USB4/Thunderbolt	Duncan Laurie
2020-10-14	soc/intel/common: Add PCI driver for USB4 ports	Tim Wawrzynczak
2020-10-13	sc7180: Enable bootblock compression	Julius Werner
2020-10-13	soc/intel/common: rewrite and clarify the Legacy 8254 Timer Kconfig	Michael Niewöhner
2020-10-13	mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devices	Furquan Shaikh
2020-10-13	src: Rename EM100Pro-specific SPI console Kconfig option	Angel Pons
2020-10-12	soc/intel: Configure PAVP at compile-time	Benjamin Doron
2020-10-12	soc/intel/cannonlake: Align cosmetics with Ice Lake	Angel Pons
2020-10-12	soc/mediatek/mt8192: Refactor USB code among similar SoCs	Zhanyong Wang
2020-10-12	soc/intel/jasperlake: Allow mainboard to override chip configuration	Karthikeyan Ramasubramanian
2020-10-12	soc/intel/jasperlake: Correct SaGv mapping	Aamir Bohra
2020-10-12	soc/intel/common/block/smm: Fix compilation without intel uart code	Patrick Rudolph
2020-10-12	soc/intel/common/block/i2c: Scan bridge devices behind I2C controllers	Karthikeyan Ramasubramanian
2020-10-12	util: Add DDR4 generic SPD for H5ANAG6NCJR-XNC	Nick Vaccaro
2020-10-12	soc/intel/jasperlake: Remove GPIO community 2 from DSDT	Evan Green
2020-10-09	soc/intel/tigerlake: Add chipset devicetree	Duncan Laurie
2020-10-09	soc/intel/xeon_sp: Use generic config_t	Marc Jones