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AgeCommit message (Expand)Author
2020-08-11soc/intel/common/block/gspi: Recalculate BAR after resource allocationJes Klinke
2020-08-11xeon_sp/cpx: Enable PCH thermal device via FSPJohnny Lin
2020-08-11soc/amd/picasso: Correct processor ACPI scopeJason Glenesk
2020-08-11soc/amd/common/espi_util: espi_send_command: improve error messageFelix Held
2020-08-11soc/amd/common/espi_util: espi_std_io_decode: fix edge case bugFelix Held
2020-08-11soc/amd/common/espi_util: simplify espi_std_io_decode functionFelix Held
2020-08-11soc/amd/common/espi_util: make decode enable parameter uint32_tFelix Held
2020-08-11soc/amd/common/espi_util: make reg parameter unsignedFelix Held
2020-08-11soc/amd/stoneyridge/acpi: clean up global NVSFelix Held
2020-08-10soc/intel/apollolake: Rename UART irqsPatrick Rudolph
2020-08-10soc/intel/apollolake: Add irq.hPatrick Rudolph
2020-08-10soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devicesPatrick Rudolph
2020-08-09soc/intel/{icl.tgl,jsl}: Remove SMRAM register programmingAamir Bohra
2020-08-08vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt socJonathan Zhang
2020-08-08soc/intel/skylake: Enable CIO depending on devicetree configurationFelix Singer
2020-08-08soc/intel/skylake: Enable SA IMGU depending on devicetree configurationFelix Singer
2020-08-08soc/intel/skylake: Add IMGU definitions to pci_devs.hFelix Singer
2020-08-08soc/intel/skylake: Enable SDXC depending on devicetree configurationFelix Singer
2020-08-08soc/mediatek/mt8192: Add initial config for new ARMv8 device MT8192CK Hu
2020-08-07soc/intel/skylake: Enable thermal subsystem depending on devicetreeFelix Singer
2020-08-07soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.hFelix Singer
2020-08-07soc/intel/cnl: Set Heci1Disable depending on devicetree configFelix Singer
2020-08-07soc/amd/picasso/acpi: remove AOAC device enables from global NVSFelix Held
2020-08-07xeon_sp/cpx: Enable HWP Intel Speed ShiftJohnny Lin
2020-08-07soc/intel/broadwell/iobp: Log success in `pch_iobp_write()`Angel Pons
2020-08-07soc/intel/common: Log CSE FW Status Registers before triggering recoverySridhar Siricilla
2020-08-07soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASESubrata Banik
2020-08-07src/soc/intel/icelake: Allow option to use USE_INTEL_FSP_MP_INITSubrata Banik
2020-08-06soc/intel/tigerlake: add common routine for DDR initNick Vaccaro
2020-08-06soc/intel/common/block/cpu: Refactor init_cpus functionSubrata Banik
2020-08-06soc/mediatek/mt8183: Set MMU default map length to 8GB befor mem initHuayang Duan
2020-08-06soc/mediatek/mt8183: Add ddr geometry to support 6GB, 8GB DDR bootupHuayang Duan
2020-08-06soc/mediatek/mt8183: Adjust tRFCab and tRFCpb by the density valueHuayang Duan
2020-08-06soc/mediatek/mt8183: Add missing register settings for channelsHuayang Duan
2020-08-05{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out codeAngel Pons
2020-08-05{nb,soc}/intel: Use get_current_microcode_rev() for ucode versionSubrata Banik
2020-08-05mb/google/zork: keep the c-state IO base address alignmentChris Wang
2020-08-05src: Use space after 'if', 'for'Elyes HAOUAS
2020-08-05src/soc/intel/common: Make top_of_ram till TOLUD region mmio_resourceSubrata Banik
2020-08-05soc/intel/common: Include Alder Lake device IDsSubrata Banik
2020-08-04soc/intel/skylake: Add RMRRs after all DRHDsAngel Pons
2020-08-04soc/intel/broadwell: Add RMRRs after all DRHDsAngel Pons
2020-08-04soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDsAngel Pons
2020-08-04soc/amd/picasso/acpi: clean up global NVSFelix Held
2020-08-04soc/intel/baytrail: Factor out `acpi_fill_madt()`Angel Pons
2020-08-03soc/amd/picasso: set is_rv to 1 for RV familyAkshu Agrawal
2020-08-03soc/intel/baytrail: Add MRC SMBus workaroundMate Kukri
2020-08-03soc/intel/xeon_sp/cpx: configure STACK_SIZEJonathan Zhang
2020-08-03soc/intel/xeon_sp/cpx: enable PLATFORM_USES_FSP2_2Jonathan Zhang
2020-08-03src/soc/intel/jasperlake: Update SD card ACPI deviceAamir Bohra