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AgeCommit message (Expand)Author
2020-06-18soc/intel/tigerlake: Enable FSP-S compressionKarthikeyan Ramasubramanian
2020-06-18soc/intel/jasperlake: Enable FSP-S compressionKarthikeyan Ramasubramanian
2020-06-18soc/intel/cannonlake: Enable FSP-S compressionKarthikeyan Ramasubramanian
2020-06-18soc/intel: remove unused dptf.asl file and other definesSumeet R Pawnikar
2020-06-18soc/intel/common: make dptf acpi device ids configurableSumeet R Pawnikar
2020-06-18soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-17Revert "soc/amd/picasso: Reconfigure SPI speeds after FSP-S has run"Furquan Shaikh
2020-06-17soc/amd/picasso: rename PICASSO_UART Kconfig optionFelix Held
2020-06-17soc/amd/picasso: fix build if PICASSO_UART is unsetFurquan Shaikh
2020-06-17soc/soch/intel/tigerlake: Integrate PCIe hot-plug config UPDWonkyu Kim
2020-06-17soc/intel/cannonlake/vr_config: Add CFL defaults to TDC powerlimitPatrick Rudolph
2020-06-17soc/intel/cannonlake: Use table instead of switch-casePatrick Rudolph
2020-06-16soc/amd/picasso/include/soc/memmap.c: Add missing <stdint.h>Elyes HAOUAS
2020-06-16cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki
2020-06-16soc/amd: Replace enable_smi_generation()Kyösti Mälkki
2020-06-16sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki
2020-06-16soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki
2020-06-16sb/intel: Remove spurious HAVE_SMI_HANDLER testKyösti Mälkki
2020-06-16arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki
2020-06-15soc/amd/common/block/acpimmio: Update acpimmio for psp_verstageMartin Roth
2020-06-15arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki
2020-06-14soc/amd/picasso/graphics: implement map_oprom_vendev_revMartin Roth
2020-06-14soc/amd/picasso/aoac: Add wait_for_aoac_enabledRaul E Rangel
2020-06-14soc/amd/picasso/aoac: Set the Target Device State when powering onRaul E Rangel
2020-06-14soc/amd/picasso: Move aoac functions to new fileRaul E Rangel
2020-06-14soc/amd/picasso: Explicitly disable legacy UARTRaul E Rangel
2020-06-14soc/intel/xeon_sp/cpx: select CACHE_MRC_SETTINGSJonathan Zhang
2020-06-14soc/amd/picasso: correct MCFG ACPI tableAaron Durbin
2020-06-14soc/intel/tigerlake: enable CPU_INTEL_COMMONAlex Levin
2020-06-14soc/amd/picasso: Increase SMM_RESERVED_SIZEMarshall Dawson
2020-06-14soc/intel/cannonlake/acpi: Capitalize hex number to unify with SkylakePaul Menzel
2020-06-14soc/intel/xeon_sp/cpx: configure FSP-M UPD parametersJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add cpu entries in ssdtJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: fix MADT ACPI tableJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add IIO stack resources to DSDTJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add NUMA ACPI tablesJonathan Zhang
2020-06-14soc/amd/picasso/acpi: Add a wrapper method WAL1 for calling ALIB function 1Furquan Shaikh
2020-06-13soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-13soc/amd/picasso: Place early stages and data buffers at the bottom of DRAMFurquan Shaikh
2020-06-13soc/amd/picasso: Add custom memlayout.ld fileFurquan Shaikh
2020-06-13treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh
2020-06-12soc/intel/tigerlake: Add devicetree support to change PCH VR settingsVenkata Krishna Nimmagadda
2020-06-12soc/amd/picasso: Reconfigure SPI speeds after FSP-S has runFurquan Shaikh
2020-06-11soc/amd/picasso/uart: fix possible out of bounds accessFelix Held
2020-06-11vc/amd/fsp/platform_descriptors: drop prefix from PCIe/DDI structsFelix Held
2020-06-10amd/picasso: Load x86 microcode from CBFS modulesZheng Bao
2020-06-10soc/intel/common: Replace cse_bp and ME with cse_lite in all console logsSridhar Siricilla
2020-06-10soc/amd/picasso: Enable APOB/MRC training data cacheFurquan Shaikh
2020-06-10soc/intel/cannonlake: Put braces around *else* branchPaul Menzel
2020-06-10soc/intel/skylake: Remove space after type castPaul Menzel