Age | Commit message (Expand) | Author |
2020-06-10 | soc/intel/common: Replace cse_bp and ME with cse_lite in all console logs | Sridhar Siricilla |
2020-06-10 | soc/amd/picasso: Enable APOB/MRC training data cache | Furquan Shaikh |
2020-06-10 | soc/intel/cannonlake: Put braces around *else* branch | Paul Menzel |
2020-06-10 | soc/intel/skylake: Remove space after type cast | Paul Menzel |
2020-06-10 | soc/intel/skylake: Use unit macros KiB and MiB | Paul Menzel |
2020-06-10 | soc/intel/tigerlake: Add Hot-Plug and PME event handlers for Thunderbolt | John Zhao |
2020-06-10 | soc/amd/picasso: initialize ACP device at init() time | Aaron Durbin |
2020-06-10 | ACPI: Remove Kconfig COMMON_FADT | Kyösti Mälkki |
2020-06-10 | sb,soc/amd, ACPI: Do not override FADT preferred_pm_profile | Kyösti Mälkki |
2020-06-10 | soc/amd/stoneyridge,picasso: Select COMMON_FADT | Kyösti Mälkki |
2020-06-10 | sb,soc/amd: Remove FADT_PM_PROFILE | Kyösti Mälkki |
2020-06-09 | soc/amd/picasso/acpi/sb_fch: use local variable in _CRS methods | Felix Held |
2020-06-09 | soc/intel/tigerlake: Set FSPS UPD ITbtConnectTopologyTimeoutInMs | John Zhao |
2020-06-09 | soc/intel/tigerlake: Increase heap size | Duncan Laurie |
2020-06-08 | soc/amd/picasso: solve MTRRs only from 4GiB and below | Aaron Durbin |
2020-06-08 | soc/amd/picasso: remove save/restore MTRRs around FSP-M | Aaron Durbin |
2020-06-08 | soc/amd/picasso: establish full early caching memory map | Aaron Durbin |
2020-06-08 | spd/lp4x: Set manufacturer part name to blank (0x20) | Furquan Shaikh |
2020-06-07 | soc/intel/baytrail,braswell,broadwell,quark: Select COMMON_FADT | Kyösti Mälkki |
2020-06-07 | soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntax | Venkata Krishna Nimmagadda |
2020-06-07 | soc/amd/picasso/cpu.c: Make comment clearer | Raul E Rangel |
2020-06-07 | soc/intel/jasperlake: Add JSL PMC as 'hidden' PCI device | Tim Wawrzynczak |
2020-06-07 | mb,soc/intel: Rename acpi_fill_in_fadt() to acpi_fill_fadt() | Kyösti Mälkki |
2020-06-07 | acpi,soc/intel: Make soc/motherboard_fill_fadt() global | Kyösti Mälkki |
2020-06-07 | soc/amd/picasso: Remove unnecessary includes from pmutil.c | Martin Roth |
2020-06-06 | src: Use pci_dev_ops_pci where applicable | Angel Pons |
2020-06-06 | soc/amd/picasso: Add device operations for UART MMIO devices | Furquan Shaikh |
2020-06-06 | src: Remove unused 'include <cpu/x86/mtrr.h>' | Elyes HAOUAS |
2020-06-06 | soc/amd/picasso: Use MSR_CSTATE_ADDRESS | Raul E Rangel |
2020-06-06 | soc/amd/picasso: Remove call to setup_bsp_ramtop | Raul E Rangel |
2020-06-06 | src: Remove unused '#include <cpu/x86/smm.h>' | Elyes HAOUAS |
2020-06-06 | soc/intel/tigerlake: Add CPU ID for TGL B0 | Jamie Ryu |
2020-06-06 | lp4x: Add new memory parts and generate SPDs | Furquan Shaikh |
2020-06-06 | soc/intel/jasperlake: Generate LP4x SPD files using gen_spd.go | Furquan Shaikh |
2020-06-06 | soc/intel/tigerlake: Generate LP4x SPD files using gen_spd.go | Furquan Shaikh |
2020-06-06 | arch/x86: Declare permanent_smi_handler() | Kyösti Mälkki |
2020-06-06 | soc,southbridge/intel: Control SMI related FADT entries | Kyösti Mälkki |
2020-06-06 | soc/intel/xeon_sp/cpx: set up cpus | Jonathan Zhang |
2020-06-05 | soc/amd/common/spi: add and use define for last FIFO position | Felix Held |
2020-06-05 | soc/amd/picasso: Add set_mmio_dev_ops() to set ops for MMIO devices | Furquan Shaikh |
2020-06-04 | soc/amd/picasso/Makefile: Allow absolute path for picasso firmware | Raul E Rangel |
2020-06-04 | soc/intel/xeon_sp/cpx: add chip operation and PCIe enumeration | Jonathan Zhang |
2020-06-04 | soc/amd/picasso: fix iomap for ACPI_PM | Kangheui Won |
2020-06-03 | soc/amd: Use mp_cpu_bus_init() | Kyösti Mälkki |
2020-06-03 | soc,southbridge/amd: Remove some explicit zero-initializers | Kyösti Mälkki |
2020-06-03 | soc/intel/quark/memmap: Add missing 'include <cpu/x86/mtrr.h>' | Elyes HAOUAS |
2020-06-03 | soc/intel/jasperlake: Update C-States info | Ronak Kanabar |
2020-06-03 | soc/intel/icelake: Fix 16-bit read/write PCI_COMMAND register | Elyes HAOUAS |
2020-06-03 | soc/tigerlake: Fix 16-bit read/write PCI_COMMAND register | Elyes HAOUAS |
2020-06-03 | soc/intel/jasperlake: Fix 16-bit read/write PCI_COMMAND register | Elyes HAOUAS |