coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-08-31	soc/intel/elkhartlake/romstage: Do initial SoC commit till romstage	Tan, Lean Sheng
2020-08-31	soc/intel/elkhartlake/bootblock: Do initial SoC commit until bootblock	Tan, Lean Sheng
2020-08-31	soc/amd/picasso/southbridge: make GPP clock outputs configurable	Felix Held
2020-08-31	soc/amd/picasso/southbridge.h: rename GPP clock setting offsets	Felix Held
2020-08-31	soc/amd/picasso/southbridge.h: replace GPP_CLK_REQ_MAP_* with macros	Felix Held
2020-08-31	soc/amd/picasso/southbridge.h: remove OSCOUT*_CLK_OUTPUT_ENB definitions	Felix Held
2020-08-31	{intel/gma,include/device}: Delete unused 'drm_dp_helper.h' file	Elyes HAOUAS
2020-08-29	PCI IDs: Add PCI ID for CML DPTF/DTT PCI device	Edward O'Callaghan
2020-08-28	amd/picasso/psp_verstage: add vboot rsa function	Kangheui Won
2020-08-28	soc/amd/picasso/romstage: Set SATA enable UPD if controller is enabled	Matt Papageorge
2020-08-28	vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt soc	Jonathan Zhang
2020-08-28	soc/intel/tigerlake: add ddr4-spd-empty.hex	Aaron Durbin
2020-08-28	mb/google/zork: Switch zork to use spd_tools	Rob Barnes
2020-08-28	util: Add memory parts needed by zork boards	Rob Barnes
2020-08-28	util/gen_spd: translate DeviceBusWidth to die bus width	Nick Vaccaro
2020-08-28	soc/mediatek/mt8192: Use SPI-NOR as flash controller	CK Hu
2020-08-28	util: rename lp4x spds to include "lp4x-" in name	Nick Vaccaro
2020-08-28	util: volteer/dedede: move generic SPDs to common location	Nick Vaccaro
2020-08-27	symbols: Change implementation details of DECLARE_OPTIONAL_REGION()	Julius Werner
2020-08-27	soc/intel/common: Include Elkhart Lake SA IDs	Tan, Lean Sheng
2020-08-27	soc/intel/common: Add Elkhart Lake B0 CPU ID	Tan, Lean Sheng
2020-08-26	soc/mediatek: Include addressmap.h in gpio_common.h	CK Hu
2020-08-26	soc/intel/tigerlake: Rename pch_init() code	Alexey Buyanov
2020-08-25	util: Add spd_tools to generate DDR4 SPDs for TGL boards	Nick Vaccaro
2020-08-25	soc/amd/picasso: If psp_verstage is in RO, don't reset on error	Martin Roth
2020-08-25	soc/mediatek/mt8192: Add dramc param struct	Huayang Duan
2020-08-25	soc/intel/jasperlake: Disable multiphase SI init	Ronak Kanabar
2020-08-25	soc/intel/jasperlake: Select PLATFORM_USES_FSP2_2	Ronak Kanabar
2020-08-24	soc/amd/picasso: Reboot for recovery if no psp workbuf is found	Martin Roth
2020-08-24	mrc_cache: Add mrc_cache fetch functions to support non-x86 platforms	Shelley Chen
2020-08-24	soc/amd/common: Move interrupt and wake status clear	Josie Nordrum
2020-08-24	soc/intel/jasperlake: Run pmc_set_acpi_mode() during .init in pmc_ops	Kane Chen
2020-08-24	soc/amd/picasso: Add console & timestamp buffers to psp_verstage	Martin Roth
2020-08-24	soc/intel/tigerlake: Fix IPU and Vtd config	Ravi Sarawadi
2020-08-24	soc/intel/jasperlake: use UDK_202005_BINDING	Ronak Kanabar
2020-08-24	soc/sifive: Drop unneeded empty lines	Elyes HAOUAS
2020-08-24	soc/amd/picasso: Store ddr_frequency in MT/s	Rob Barnes
2020-08-24	soc/intel/common: Add downgrade support for CSE Firmware	Sridhar Siricilla
2020-08-23	soc/amd/picasso/romstage: Set HDA disable UPD if controller disabled	Felix Held
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-21	soc/amd/picasso: If using VBOOT, skip the APOB_NV region for RO	Martin Roth
2020-08-21	soc/amd/common: add rudimentary ATIF support	Aaron Durbin
2020-08-21	SMM: Validate more user-provided pointers	Patrick Rudolph
2020-08-21	soc/intel/tigerlake: Enable long cr50 ready pulses	Jes Klinke
2020-08-21	soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE	Harshit Sharma
2020-08-20	cse_lite: Move global reset after MRC writeback	Caveh Jalali
2020-08-20	soc/amd/acpi: Move ACPI IVRS generation to coreboot	Jason Glenesk
2020-08-20	soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS'	Elyes HAOUAS
2020-08-19	cpu/ti/am335x: Move from cpu to soc in tree	Sam Lewis
2020-08-19	soc/amd/picasso: log and print GPIO wake events	Aaron Durbin