coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-13	soc/amd/common/block/spi: Include mmio.h in fch_spi_ctrl.c	Furquan Shaikh
2020-05-13	soc/amd/common/block/lpc: Add helper function lpc_early_init()	Furquan Shaikh
2020-05-12	soc/intel/skylake: Add ability to set root port ASPM	Wim Vervoorn
2020-05-12	soc/intel/tigerlake: Correct IRQ interrupt	Wonkyu Kim
2020-05-12	device/pci_device: Extract pci_domain_set_resources from SOC	Raul E Rangel
2020-05-12	soc/intel/jasperlake: Remove deprecated UPDs	Ronak Kanabar
2020-05-12	soc/intel/jasperlake: Add SATA related UPDs configuration	Ronak Kanabar
2020-05-12	soc/amd/common/block/lpc: Configure io/mmio windows differently for LPC and eSPI	Furquan Shaikh
2020-05-12	soc/amd/common/block/lpc: Provide an option to use static eSPI BAR	Furquan Shaikh
2020-05-12	soc/intel/tigerlake: Control SATA and DMI power optimization	Shaunak Saha
2020-05-12	soc/amd/common/block/lpc: Add helpers for managing eSPI decode	Furquan Shaikh
2020-05-12	soc/amd/common/block: Add header file for eSPI register definitions	Furquan Shaikh
2020-05-12	soc/amd/common/block/lpc: Set LPC_IO_PORT_DECODE_ENABLE to 0 when disabling d...	Furquan Shaikh
2020-05-12	soc/amd/picasso: Use SPI configuration support from common block SPI driver	Furquan Shaikh
2020-05-12	soc/amd/picasso: Add support for using common SoC configuration	Furquan Shaikh
2020-05-12	soc/amd/common/block/spi: Add support for common SPI configuration	Furquan Shaikh
2020-05-12	soc/intel/skl: Drop weak mainboard_memory_init_params	Angel Pons
2020-05-12	soc/amd/common/block/lpc: Split lpc_set_spibase() into two functions	Furquan Shaikh
2020-05-12	soc/amd/common/block: Add support for common config for AMD SoCs	Furquan Shaikh
2020-05-11	sc7180: clock: Add support to bump CPU levels	Taniya Das
2020-05-11	sc7180: Adjust memory allocations per upstream comments	T Michael Turney
2020-05-11	trogdor: QCSDI loading depends on VB2_GBB_FLAG_RUNNING_FAFT setting flag	Ashwin Kumar
2020-05-11	sc7180: Fix for hang during DMA transfer in SPI-NOR flash driver	satya priya
2020-05-11	soc/amd/common/block/lpc: Reorganize LPC enable resources	Furquan Shaikh
2020-05-11	soc/amd/common/block/lpc: Add config options for eSPI	Furquan Shaikh
2020-05-11	soc/intel/quark: Revamp file headers	Patrick Georgi
2020-05-11	treewide: Replace BSD-3-Clause and ISC headers with SPDX headers	Patrick Georgi
2020-05-11	treewide: split off license text, remove extra copyright notices	Patrick Georgi
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-11	soc/intel/skylake: Allow setting of PcieRpMaxPayload	Wim Vervoorn
2020-05-11	soc/sifive/fu540: Add missing '#include <commonlib/bsd/helpers.h>'	Elyes HAOUAS
2020-05-11	soc/intel/tigerlake: Update C-State info	Wonkyu Kim
2020-05-11	soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX	Michael Niewöhner
2020-05-11	soc/intel/jasperlake: Add ACPI device name for Storage controllers	Karthikeyan Ramasubramanian
2020-05-11	soc/intel/jasperlake: Enable end of post support in FSP	Aamir Bohra
2020-05-10	src: Replace remaining GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-05-09	vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled()	Julius Werner
2020-05-08	{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-05-08	soc/nvidia: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-05-08	soc/qualcomm: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-05-08	soc/intel: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-05-08	soc/intel/skl: Drop `acpi_mainboard_gnvs`	Angel Pons
2020-05-07	soc/intel/tigerlake: Add PMC to platform ACPI name entry	John Zhao
2020-05-07	soc/amd/common/block/lpc: Use standard pci_dev_ops_pci	Furquan Shaikh
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: move copyrights and authors to AUTHORS	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-05-06	soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel	Shaunak Saha
2020-05-06	soc/intel/tigerlake: Print HPR_CAUSE0 register	derek.huang