summaryrefslogtreecommitdiff
path: root/src/soc
AgeCommit message (Expand)Author
2015-07-21intel/common: remove printk in pre_console_init()rsatapat
2015-07-21Skylake: Initialize GPIOs for UART2rsatapat
2015-07-21Skylake: Only support UART2 as debug port, clean up the restNaveen Krishna Chatradhi
2015-07-21intel fsp: remove CHIPSET_RESERVED_MEM_BYTESAaron Durbin
2015-07-21Braswell: Remove GOP from normal boot mode.Abhay Kumar
2015-07-21skylake: re-enable PCIe L1 sub statesAaron Durbin
2015-07-21skylake: honor pcie root port settings already in chip.hAaron Durbin
2015-07-21skylake: Show SPI controller if enabled in devicetree.cbDuncan Laurie
2015-07-21braswell: clean up \_PR entriesJagadish Krishnamoorthy
2015-07-17soc/intel: Remove microcode terminatorsStefan Reinauer
2015-07-17skylake: remove whitespace from ASL filesStefan Reinauer
2015-07-16t210: new sdram_lp0_save_params() functionYen Lin
2015-07-16t210: correct odmdata location in bctYen Lin
2015-07-16t210: Reorganize memlayout.ldFurquan Shaikh
2015-07-16t210: SPI driver cleanupFurquan Shaikh
2015-07-16t210: Correct dma_busy functionFurquan Shaikh
2015-07-16t210: Add PINMUX macros for drive strengthFurquan Shaikh
2015-07-16soc/intel: Add Skylake SOC supportLee Leahy
2015-07-16soc/intel/skylake: Use Broadwell as comparision base for Skylake SOCLee Leahy
2015-07-14Braswell: Use CBFS image type nameLee Leahy
2015-07-14azalia: fix up and clean up shrinkage of boilerplate codeJonathan A. Kollasch
2015-07-13tegra124/tegra210: Include stages.h in bootblock.cStefan Reinauer
2015-07-13tegra210: Fix coding style in clock.cStefan Reinauer
2015-07-13t210: Apply A57 hardware issue workaround during cpu startupFurquan Shaikh
2015-07-13t210: Add TZDRAM_BASE param to BL31_MAKEARGSFurquan Shaikh
2015-07-12Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED()Martin Roth
2015-07-10Braswell: Move the microcode into a subdirectoryLee Leahy
2015-07-09rk3288: Fix & vs && mix up in hdmi driverStefan Reinauer
2015-07-09ipq8064: enable timestamp collectionVadim Bendebury
2015-07-09t210: set CAR2PMC_CPU_ACK_WIDTH to 0Yen Lin
2015-07-09t210: i2c6: enable SOR_SAFE and DPAUX1 clocks for i2c6 to workYen Lin
2015-07-08Braswell: Fix error in the warranty statementLee Leahy
2015-07-08memlayout: Add timestamp regions for t210 and cygnusStefan Reinauer
2015-07-07marvel/bg4cd: move timestamp init to SoC codePatrick Georgi
2015-07-07rk3288: Use timestamp region for pre-cbmem timestampsFurquan Shaikh
2015-07-07t132: Add timestamp collection support in t132Furquan Shaikh
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-07-07T210: UTMIP: Correct UTMIP PLL programming as per Mark KuoTom Warren
2015-07-06Braswell: Update to end of June.Lee Leahy
2015-07-06Braswell: Update the ACPI tablesLee Leahy
2015-07-06veyron*: Kill SKIP_DISPLAY_INIT_HACKDavid Hendricks
2015-07-06t210: MTC cleanupFurquan Shaikh
2015-07-06rk3288: Add VOP_MODE_NONE for headless devicesDavid Hendricks
2015-07-06rk3288: Auto-detect display.David Hendricks
2015-07-06rockchip: rk3288: correct ddr 300MHz clock settinghuang lin
2015-07-04Kconfig: Fix references to obsolete symbolsMartin Roth
2015-07-03Kconfig whitespace cleanup: Change leading spaces to tabsMartin Roth
2015-07-02tegra124: verified boot fixupsStefan Reinauer
2015-07-02Move baytrail & fsp_baytrail to the common IFD interface.Martin Roth
2015-07-01tegra132: adjust vboot2 memlayout to make coreboot compileStefan Reinauer