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AgeCommit message (Expand)Author
2019-12-18src: Remove unused 'include <bootblock_common.h>'Elyes HAOUAS
2019-12-17soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MBWim Vervoorn
2019-12-17soc/intel/skylake: Add irq 11 to the LNK* _PRSWim Vervoorn
2019-12-17soc/intel/apollolake: add support for extracting LBP2 from IFWIJeremy Compostella
2019-12-17soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash rangeWim Vervoorn
2019-12-17src: Conditionally include TEVTFrans Hendriks
2019-12-16src/soc/intel/cannonlake: Bump MAX_CPU from 8->12Edward O'Callaghan
2019-12-16soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper LakeAamir Bohra
2019-12-16soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stagesKyösti Mälkki
2019-12-163rdparty/fsp: Update to current master againNico Huber
2019-12-16sc7180: clock: Add support for QUP DFSR configurationTaniya Das
2019-12-16soc/intel/common/block/chip/Kconfig: Fix minor whitespaceHimanshu Sahdev aka CunningLearner
2019-12-16soc/intel/tigerlake: Pick correct pmc base reg from pch typeMaulik V Vaghela
2019-12-14Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID"Nico Huber
2019-12-14bootblock: Provide some common prototypesKyösti Mälkki
2019-12-13soc/intel/common: Add PCI device IDs for CMP-HGaggery Tsai
2019-12-12soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX windowHuayang Duan
2019-12-12soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.hFurquan Shaikh
2019-12-11fmap: Make FMAP_CACHE mandatory if it is configured inJulius Werner
2019-12-11soc/amd/stoneyridge|mbs: Deprecate SOC_AMD_NAME_PKG and othersMarshall Dawson
2019-12-11soc/amd/stoneyridge|mbs: Define SOC_AMD_STONEYRIDGE symbolMarshall Dawson
2019-12-11soc/amd/stoneyridge|mb: Add Kconfig symbol for Prairie FalconMarshall Dawson
2019-12-11soc/amd/stoneyridge|vc: Change default locations for blobsMarshall Dawson
2019-12-11printf: Automatically prefix %p with 0xJulius Werner
2019-12-11soc/intel/tigerlake: Include soc common lpss header fileAamir Bohra
2019-12-11soc/intel/tigerlake: add soc implementation for ETR address APIAamir Bohra
2019-12-11soc/intel/Kconfig: Load Tiger Lake SOC KconfigAamir Bohra
2019-12-10soc/intel/common: Add Jasperlake Device IDsrkanabar
2019-12-10amdblocks/pci: add common implementation of MMCONF enablingMichał Żygowski
2019-12-10include/device/pci_ids: Add Coffeelake U IGD P630Christian Walter
2019-12-093rdparts/fsp: Update fsp submoduleJohanna Schander
2019-12-09soc/intel/bsw/gpio: Factor out GPI macrosAngel Pons
2019-12-06soc/intel/skylake: Add option to control microcode update inclusionWim Vervoorn
2019-12-06mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.Philipp Hug
2019-12-05soc/qualcomm/sc7180: Adapt to recent API changesPatrick Georgi
2019-12-05soc/intel/braswell: Use common sb code for SPI lockdown configurationArthur Heymans
2019-12-05sc7180: Add USB supportT Michael Turney
2019-12-05sc7180: Add AOP firmware supportRavi Kumar Bokka
2019-12-05sc7180: Add SPI-NOR supportAkash Asthana
2019-12-05sc7180: Add clock driverTaniya Das
2019-12-04Change all clrsetbits_leXX() to clrsetbitsXX()Julius Werner
2019-12-04amdblocks/acpimmio: add common functions for AP entryMichał Żygowski
2019-12-04amdblocks/acpimmio: Unify BIOSRAM usageMichał Żygowski
2019-12-04soc/amd/common/block/acpimmio: fix ACPIMMIO decode enable functionMichał Żygowski
2019-12-03src: Add missing include <stdlib.h>Elyes HAOUAS
2019-12-03soc/intel/cannonlake: Configure GPIO PM configuration in bootblockSubrata Banik
2019-12-03soc/amd/stoneyridge: Use USE_AMD_BLOBS to remove default pathsMarshall Dawson
2019-12-03soc/nvidia/tegra: Constify variablePatrick Georgi
2019-12-03soc/intel/common/cse: Update comment for post-CAR global worldPatrick Georgi
2019-12-02soc/intel/cannonlake: Add gfx.asl fileMathew King