| Age | Commit message (Expand) | Author |
|---|
| 2019-12-27 | soc/amd/common: Correct SPI FIFO size check | Marshall Dawson |
| 2019-12-27 | arch/x86: Remove <arch/cbfs.h> | Kyösti Mälkki |
| 2019-12-26 | soc/broadwell/minihd: correct vendor, subsystem IDs | Matt DeVillier |
| 2019-12-26 | soc/intel/cannonlake: Move GPIO PM configuration to soc level | Eric Lai |
| 2019-12-26 | soc/amd/picasso: Configure APOB NV only with ACPI resume | Marshall Dawson |
| 2019-12-26 | src: Remove unused include <string.h> | Elyes HAOUAS |
| 2019-12-26 | soc/intel/cannonlake: Clean up report_cpu_info() function | Usha P |
| 2019-12-26 | soc/intel/cannonlake: Refactor pch_early_init() code | Usha P |
| 2019-12-26 | soc/intel/skylake: Rename pch_init() code | Usha P |
| 2019-12-26 | soc/amd/common/car: Remove unneeded header | Kyösti Mälkki |
| 2019-12-25 | soc/intel/skylake/vr_config: Use lookup table by default | Patrick Rudolph |
| 2019-12-20 | soc/intel/tigerlake: Update FSP stack and heap size | Maulik V Vaghela |
| 2019-12-20 | soc/mediatek/mt8183: Use DDR clock to compute Tx delay cell | Huayang Duan |
| 2019-12-20 | AMD {SoC, AGESA, binaryPI}: Don't use both of _ADR and _HID | Michał Żygowski |
| 2019-12-20 | {drivers,soc}/intel/fsp1_1: Move chipset specific logo handling to SoC | Wim Vervoorn |
| 2019-12-20 | src: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
| 2019-12-20 | {nb,soc}: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
| 2019-12-19 | soc/amd/picasso: Reduce romstage.c | Marshall Dawson |
| 2019-12-19 | soc/amd/picasso: Remove unused Kconfig options | Marshall Dawson |
| 2019-12-19 | arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE | Kyösti Mälkki |
| 2019-12-19 | {drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoC | Wim Vervoorn |
| 2019-12-19 | soc/intel/tigerlake: Add required header files in pch.c | Aamir Bohra |
| 2019-12-19 | src: Remove unused 'include <arch/cpu.h>' | Elyes HAOUAS |
| 2019-12-19 | src/soc/intel: Remove unused <stdlib.h> | Elyes HAOUAS |
| 2019-12-19 | src/soc/samsung: Remove unused <stdlib.h> | Elyes HAOUAS |
| 2019-12-19 | soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h> | Elyes HAOUAS |
| 2019-12-19 | src: Use '#include <smp/node.h>' when appropriate | Elyes HAOUAS |
| 2019-12-19 | soc/qualcomm/sdm845: Remove unused 'include <timestamp.h>' | Elyes HAOUAS |
| 2019-12-19 | src/soc/qualcomm: Remove unused <stdlib.h> | Elyes HAOUAS |
| 2019-12-19 | src/soc/nvidia: Remove unused <stdlib.h> | Elyes HAOUAS |
| 2019-12-19 | src/soc/rockchip: Remove unused <stdlib.h> | Elyes HAOUAS |
| 2019-12-19 | src: Remove unused include <device/smbus_def.h> | Elyes HAOUAS |
| 2019-12-19 | src: Remove unneeded 'include <delay.h>' | Elyes HAOUAS |
| 2019-12-19 | src: Remove unused 'include <halt.h>' | Elyes HAOUAS |
| 2019-12-18 | src: Remove unused 'include <bootblock_common.h>' | Elyes HAOUAS |
| 2019-12-17 | soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MB | Wim Vervoorn |
| 2019-12-17 | soc/intel/skylake: Add irq 11 to the LNK* _PRS | Wim Vervoorn |
| 2019-12-17 | soc/intel/apollolake: add support for extracting LBP2 from IFWI | Jeremy Compostella |
| 2019-12-17 | soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range | Wim Vervoorn |
| 2019-12-17 | src: Conditionally include TEVT | Frans Hendriks |
| 2019-12-16 | src/soc/intel/cannonlake: Bump MAX_CPU from 8->12 | Edward O'Callaghan |
| 2019-12-16 | soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper Lake | Aamir Bohra |
| 2019-12-16 | soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages | Kyösti Mälkki |
| 2019-12-16 | 3rdparty/fsp: Update to current master again | Nico Huber |
| 2019-12-16 | sc7180: clock: Add support for QUP DFSR configuration | Taniya Das |
| 2019-12-16 | soc/intel/common/block/chip/Kconfig: Fix minor whitespace | Himanshu Sahdev aka CunningLearner |
| 2019-12-16 | soc/intel/tigerlake: Pick correct pmc base reg from pch type | Maulik V Vaghela |
| 2019-12-14 | Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID" | Nico Huber |
| 2019-12-14 | bootblock: Provide some common prototypes | Kyösti Mälkki |
| 2019-12-13 | soc/intel/common: Add PCI device IDs for CMP-H | Gaggery Tsai |
