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e6230
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Some coreboot project code with my work
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2020-07-27
soc/amd: Use spi_writeX & spi_readX for all spi accesses
Martin Roth
2020-07-27
soc/amd/common: Move spi access functions into their own file
Martin Roth
2020-07-27
soc/amd/picasso: Set __USER_SPACE__ for psp_verstage
Martin Roth
2020-07-27
soc/amd/picasso: make USB over-current pin mapping configurable
Felix Held
2020-07-27
soc/intel/jasperlake: Invoke PCIe root port swapping
Karthikeyan Ramasubramanian
2020-07-26
soc/intel/tigerlake: Disable CPU PCIe in FSP
Shaunak Saha
2020-07-26
soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform
John Zhao
2020-07-26
soc/intel/common/basecode: Implement CSE update flow
Rizwan Qureshi
2020-07-26
soc/amd/common/block/psp/psp_smm.c: Add missing <string.h>
Elyes HAOUAS
2020-07-26
src/soc/qualcomm: Add include <types.h>
Elyes HAOUAS
2020-07-26
src/soc/mediatek: Add include <types.h>
Elyes HAOUAS
2020-07-26
src/soc/intel: Add include <types.h>
Elyes HAOUAS
2020-07-26
soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG
Maxim Polyakov
2020-07-26
soc/intel/common/hda: Add HDA ID for Jasper Lake
yan.liu
2020-07-26
soc/intel/jasperlakelake: Rename pch_init() code
Usha P
2020-07-26
src: Update bare access to BOOL CONFIG_ vals to CONFIG()
Martin Roth
2020-07-26
src: Change BOOL CONFIG_ to CONFIG() in comments & strings
Martin Roth
2020-07-26
src: Remove whitespace between 'sizeof' and '('
Elyes HAOUAS
2020-07-26
{sb,soc}/intel/**/*.c: Use macros for PCI COMMAND bits
Angel Pons
2020-07-26
soc/amd/common: Refactor and consolidate code for spi base
Martin Roth
2020-07-26
soc/amd/picasso: Update postcode value
Martin Roth
2020-07-26
Kconfig: Remove unnecessary choice names
Martin Roth
2020-07-26
smp/spinlock: Do not define barrier() globally
Kyösti Mälkki
2020-07-26
arch/x86: Move cpu_relax()
Kyösti Mälkki
2020-07-26
cpu,soc/intel: Drop select SMP
Kyösti Mälkki
2020-07-26
src: Remove unused 'include <cbmem.h>'
Elyes HAOUAS
2020-07-26
src: Remove extra lines in license header
Elyes HAOUAS
2020-07-26
skylake boards: Factor out copy-pasted PIRQ routes
Angel Pons
2020-07-26
src: Remove unused include <cpu/x86/smm.h>
Elyes HAOUAS
2020-07-26
amd/picasso: rework USB2 PHY tune parameter handling
Felix Held
2020-07-26
soc/skylake: Configure SATA options only if SATA is enabled
Felix Singer
2020-07-25
soc/amd/picasso: don't apply unconfigured USB2 PHY tune parameters
Felix Held
2020-07-25
soc/intel/baytrail/southcluster.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/include/soc/irq.h: Add braces
Angel Pons
2020-07-25
soc/intel/baytrail: Simplify pattrs definitions
Angel Pons
2020-07-25
soc/intel/baytrail/smm.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/smihandler.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/cpu.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/sd.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/lpss.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/lpe.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/{baytrail,braswell}: Drop unneeded `return`
Angel Pons
2020-07-25
soc/intel/baytrail/iosf.c: Add missing braces
Angel Pons
2020-07-25
soc/intel/baytrail/elog.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/cpu.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/acpi.c: Align with Braswell
Angel Pons
2020-07-25
soc/intel/baytrail/bootblock/bootblock.c: Move functions
Angel Pons
2020-07-25
soc/intel/baytrail: Retype some pointers
Angel Pons
2020-07-25
soc/intel/tigerlake: Update Pkg C-State latencies
Ravi Sarawadi
2020-07-25
soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU
Sumeet R Pawnikar
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