coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-08-05	soc/intel/common: Include Alder Lake device IDs	Subrata Banik
2020-08-04	soc/intel/skylake: Add RMRRs after all DRHDs	Angel Pons
2020-08-04	soc/intel/broadwell: Add RMRRs after all DRHDs	Angel Pons
2020-08-04	soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDs	Angel Pons
2020-08-04	soc/amd/picasso/acpi: clean up global NVS	Felix Held
2020-08-04	soc/intel/baytrail: Factor out `acpi_fill_madt()`	Angel Pons
2020-08-03	soc/amd/picasso: set is_rv to 1 for RV family	Akshu Agrawal
2020-08-03	soc/intel/baytrail: Add MRC SMBus workaround	Mate Kukri
2020-08-03	soc/intel/xeon_sp/cpx: configure STACK_SIZE	Jonathan Zhang
2020-08-03	soc/intel/xeon_sp/cpx: enable PLATFORM_USES_FSP2_2	Jonathan Zhang
2020-08-03	src/soc/intel/jasperlake: Update SD card ACPI device	Aamir Bohra
2020-08-03	Change all assert(0) to BUG()	Julius Werner
2020-08-03	qualcomm/sc7180: Fix TLMM assignments for GPIOs 29, 31 and 32	Julius Werner
2020-08-03	soc/intel/tigerlake: Invoke PCIe root port swapping	Caveh Jalali
2020-08-02	soc/intel/baytrail/northcluster.c: Clean up comments	Angel Pons
2020-08-02	soc/intel/baytrail/sata.c: Fix SATA init sequence	Angel Pons
2020-08-02	soc/intel/baytrail: Add native refcode replacement	Mate Kukri
2020-08-02	soc/intel/baytrail/northcluster.c: Rename variable	Angel Pons
2020-08-02	soc/intel/baytrail/northcluster.c: Tidy up long lines	Angel Pons
2020-08-02	soc/intel/braswell/northcluster.c: Tidy up long lines	Angel Pons
2020-08-02	soc/intel/braswell/northcluster.c: Rename macro	Angel Pons
2020-08-01	soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecated	Subrata Banik
2020-07-31	soc/intel/cannonlake: Fix DMAR when no iGPU is present	Patrick Rudolph
2020-07-31	soc/intel/xeon_sp/cpx: configure DIMM_MAX and DIMM_SPD_SIZE	Jonathan Zhang
2020-07-30	smbios: Fix type 17 for Windows 10	Patrick Rudolph
2020-07-30	mb/amd,google/mandolin,zork: Set EFS SPI platform config	Matt Papageorge
2020-07-30	amd/common/block/spi: Add EFS SPI configurations to Kconfig	Matt Papageorge
2020-07-30	soc/amd/picasso: Split ops for internal and external PCIe GPP bridges	Furquan Shaikh
2020-07-29	soc/intel/tigerlake: Configure TCSS D3Hot and D3Cold	John Zhao
2020-07-29	soc/intel/skylake: Enable HDA depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable HECI3 depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable eMMC depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable TraceHub depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SMBus depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable LAN depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SATA depending on devicetree configuration	Felix Singer
2020-07-29	src/soc/rockchip: Add missing <{stddef,stdint}.h>	Elyes HAOUAS
2020-07-29	soc/intel/tigerlake: Set default USB3 de-emphasis to -3.5dB	Duncan Laurie
2020-07-29	soc/intel/jasperlake: Clean up report_cpu_info() function	Usha P
2020-07-29	util/apcb: Strip SPD manufacturer information	Rob Barnes
2020-07-29	src/soc/samsung/exynos{5250,s5420}: Add missing <{stddef,stdint}.h>	Elyes HAOUAS
2020-07-28	soc/amd/picasso: Add controls for SMT and downcoring	Marshall Dawson
2020-07-28	src/soc/amd: Add include <types.h>	Elyes HAOUAS
2020-07-28	soc/amd/picasso: Enable VBNV_BACKUP_TO_FLASH for psp_verstage	Martin Roth
2020-07-28	soc/amd/picasso: Init SPI in psp_verstage	Martin Roth
2020-07-28	soc/amd/picasso/Makefile.inc: force an error if PSPBTLDR_FILE is not set	Ronald G Minnich
2020-07-28	src: Never set ISA Enable on PCI bridges	Angel Pons
2020-07-28	soc/intel/braswell/fadt.c: Use `ACPI_ADDRESS_SPACE_IO` macro	Angel Pons
2020-07-28	broadwell: Factor out PIRQ routing from devicetree	Angel Pons
2020-07-28	soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabled	Felix Singer