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path: root/src/soc
AgeCommit message (Expand)Author
2018-01-15Intel sch board & chip: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-15DMP Vortex86ex board & chip: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-13soc/amd/stoneyridge: Add definition for GENINT_DISABLEMartin Roth
2018-01-13soc/amd/stonyridge: Give I2C devices unique _UIDsDaniel Kurtz
2018-01-13Revert "soc/amd/common/pi: Fix issue in AGESA heap allocator"Marc Jones
2018-01-12soc/intel/common/block: Check for NULL before dereferenceShaunak Saha
2018-01-12soc/intel/skylake: Override KBL IccMax settingsGaggery Tsai
2018-01-12soc/intel/common: Add Intel HDA common block driverDuncan Laurie
2018-01-12amd/stoneyridge: Keep SPI flash cacheable during POSTMarshall Dawson
2018-01-12soc/amd/common/pi: Fix issue in AGESA heap allocatorMarc Jones
2018-01-10soc/rockchip/rk3399: Ensure full eDP init sequenceEge Mihmanli
2018-01-10soc/intel/cannonlake: Add a call to gspi_early_bar_init in bootblockFurquan Shaikh
2018-01-10soc/amd/common/block/acpi: Add halt.cChris Ching
2018-01-09soc/intel/cannonlake: Remove redundent CNL CPUID macrosSubrata Banik
2018-01-08soc/amd/stoneyridge/i2c: fix formatting and global symbolAaron Durbin
2018-01-08soc/intel/cannonlake: Initialize DDI-A lane in Normal modeAbhay Kumar
2018-01-08soc/amd/stoneyridge: Define CONSOLE_UART_BASE_ADDRESSArthur Heymans
2018-01-07soc/amd/common: Only load post-memory AGESA into RAM when split enabledDaniel Kurtz
2018-01-07soc/intel/cannonlake: provide LPDDR4 memory initNick Vaccaro
2018-01-073rdparty/blobs/soc/amd/stoneyridge: Use new location of stoneyridge blobRichard Spiegel
2018-01-05soc/intel/cannonlake: Correct PMC/GPIO routing informationLijian Zhao
2018-01-05soc/amd/common: load post-memory AGESA as rmoduleAaron Durbin
2018-01-05soc/amd/common: Allow AGESA file split for pre- and post-memoryJustin TerAvest
2018-01-03soc/amd/stoneyridge: Add I2C supportChris Ching
2018-01-02soc/amd/common/block/pi: Format files to standardsRichard Spiegel
2018-01-02soc/intel/skylake: Add device setting for sata power optimizationKane Chen
2017-12-23soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2Furquan Shaikh
2017-12-23soc/intel/common/block/gspi: Add SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2Furquan Shaikh
2017-12-23soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak...Subrata Banik
2017-12-22soc/amd/stoneyridge/chip.c: Move setup_bsp_ramtop to soc_init()Richard Spiegel
2017-12-22soc/intel: Treat time-out as failure in HECILijian Zhao
2017-12-22amd/stoneyridge: Increase pre-cbmem console sizeMarshall Dawson
2017-12-22soc/intel/skylake: Add PcieRpClkSrcNumber UPD configuartion supportDivya Chellap
2017-12-22ic2/designware: Move Intel i2c logic to shared driverChris Ching
2017-12-22soc/amd/stoneyridge: select RTCMarc Jones
2017-12-22soc/intel/skylake: Make use of common SMM code for SKLSubrata Banik
2017-12-22soc/intel/cannonlake: Add SoC API to make use SMM common codeSubrata Banik
2017-12-22soc/intel/common: Add missing SoC common function into SMM librarySubrata Banik
2017-12-21soc/intel/cannonlake: Implement pmc_soc_restore_power_failure as per EDSSubrata Banik
2017-12-21soc/intel/skylake: Move Enable power button SMI code from smi.c to pmc.cSubrata Banik
2017-12-21soc/intel/skylake: Implement pmc_soc_restore_power_failure as per EDSSubrata Banik
2017-12-21soc/intel/common: Add API to restore power failure into PMC common codeSubrata Banik
2017-12-20soc/intel/apollolake: Add SMI and SCI support for ESPIShaunak Saha
2017-12-20soc/intel/denverton_ns: Add Denverton-AD system agent idLew, Chee Soon
2017-12-20soc/intel/cannonlake: Tell FSPM UART port numberLijian Zhao
2017-12-20amd/common/psp: Add BootDone commandMarshall Dawson
2017-12-20amd/common/psp: Convert structure init to C99Marshall Dawson
2017-12-20amd/common/psp: Assume PSP command register already set upMarshall Dawson
2017-12-20amd/stoneyridge: Force PSP command reg settings in bootblockMarshall Dawson
2017-12-19soc/amd/common/block/pci: Fix validation of pointerRichard Spiegel