coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2014-11-20	AMD: Isolate AGESA and PI build environments for southbridge	Kyösti Mälkki
2014-07-14	AMD SPI: Optimise for longer writes	Kyösti Mälkki
2014-04-29	AGESA SPI: Fix Kconfig options	Kyösti Mälkki
2013-06-29	AMD S3 resume: Add framwork to write bigger data	Siyuan Wang
2012-11-30	AMD S3: Leverage the public SPI routine	Zheng Bao
2012-08-30	AMD S3: The offset of the nv storage depends on config.h	Zheng Bao
2012-08-05	AMD S3: Remove the hardcoded volatile position	zbao
2012-07-14	AGESA F15 wrapper for Hudson.	zbao
2011-06-22	Rename {CPU\|NB\|SB}/amd/*_wrapper folders	efdesign98
2011-03-28	Add the SR5650 & SP5100 to the Kconfig and Makefile.inc	Zheng Bao
2011-02-14	This code provides southbridge initialization for SB800 south bridges. It is...	Frank Vibrans
2011-01-20	This sb800 code is derived from sb700.	Zheng Bao
2011-01-18	remove the code which is not ready to release.	Zheng Bao
2011-01-01	Add AMD SB800 southbridge support via cimx_wrapper.	Kerry She
2010-03-16	Add entries of RS780, SB700, Mahogany, Mahogany_fam10 into the	Zheng Bao
2009-09-25	some progress on kconfig:	Patrick Georgi
2009-08-29	This is the final set of changes to allow rumba to build. Rumba is not	Ronald G. Minnich
2009-08-27	Added support for the AMD RS690 and SB600 southbridges in Kconfig	Cristi Măgherușan
2009-08-12	This now builds.	Ronald G. Minnich
2009-08-12	Kconfig!	Patrick Georgi