coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2013-02-21	AMD S3: Introduce Kconfig variable 'S3_DATA_SIZE'	Zheng Bao
2013-02-19	AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS	Zheng Bao
2012-12-14	AMD S3: Rename generated s3.rom for make clean	Zheng Bao
2012-08-30	AMD S3: The offset of the nv storage depends on config.h	Zheng Bao
2012-08-05	AMD S3: Remove the hardcoded volatile position	zbao
2012-07-14	AGESA F15 wrapper for Hudson.	zbao
2012-07-03	Fix AMD S3 block generator on Cygwin	Patrick Georgi
2012-04-19	Do not produce temp s3.rom if the board doesn't need it.	zbao
2012-04-17	More portable s3 scratch space creation	Patrick Georgi
2012-04-12	Add Southbridge support for S3.	zbao
2012-02-29	AMD southbridge: remove sp5100	Kyösti Mälkki
2012-02-16	SB700 southbridge: AMD SB700/SP5100 southbridge CIMX wrapper	Kerry Sheh
2011-12-06	Fix AMD 8132 and 8151 southbridge builds	Kyösti Mälkki
2011-09-07	AMD F14 southbridge update	Kerry She
2011-06-28	Addition of Family12/SB900 wrapper code	efdesign98
2011-06-22	Rename {CPU\|NB\|SB}/amd/*_wrapper folders	efdesign98
2011-03-28	Add the SR5650 & SP5100 to the Kconfig and Makefile.inc	Zheng Bao
2011-02-14	This code provides southbridge initialization for SB800 south bridges. It is...	Frank Vibrans
2011-01-20	This sb800 code is derived from sb700.	Zheng Bao
2011-01-18	remove the code which is not ready to release.	Zheng Bao
2011-01-01	Add AMD SB800 southbridge support via cimx_wrapper.	Kerry She
2010-03-16	Add entries of RS780, SB700, Mahogany, Mahogany_fam10 into the	Zheng Bao
2009-08-25	Various Kconfig and Makefile.inc fixes and cosmetics.	Uwe Hermann
2009-08-12	This now builds.	Ronald G. Minnich
2009-08-12	Kconfig!	Patrick Georgi