coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-04-27	sb/pi/hudson: Const'ify pci_devfn_t devices	Elyes HAOUAS
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-12-21	sb/amd/{agesa,pi,cimx}/bootblock: Use simple PCI config accessor	Kyösti Mälkki
2019-12-20	AGESA,binaryPI: Drop remains of ROMCC_BOOTBLOCK	Kyösti Mälkki
2019-12-10	sb/amd/{agesa,pi}/hudson: Explicitly enable LPC controller	Kyösti Mälkki
2019-12-09	AGESA,binaryPI: Move PORT80 selection to C bootblock	Kyösti Mälkki
2019-12-04	sb/amd/{agesa,pi}/hudson: add southbridge C bootblock initialization	Michał Żygowski
2019-10-18	src: Remove unused include '<device/pci_ids.h>'	Elyes HAOUAS
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2016-12-01	AMD binaryPI: Use explicit PCI IO config access in bootblock	Kyösti Mälkki
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-01-27	southbridge/amd/pi: Rename Avalon to Hudson	Dave Frodin