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Some coreboot project code with my work
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southbridge
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amd
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sb800
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lpc.c
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Author
2016-08-03
sb/amd/sb[6|7|8]00: Initialize PIC
Timothy Pearson
2016-07-31
src/southbridge: Capitalize CPU, RAM and ROM
Elyes HAOUAS
2015-12-18
southbridge/amd/sr5650: Add MCFG ACPI table support
Timothy Pearson
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-04
devicetree: Discriminate device ops scan_bus()
Kyösti Mälkki
2015-05-26
acpi: Remove monolithic ACPI
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-12-30
drivers/pc80/mc146818rtc: Assume we always have ALTCENTURY
Gabe Black
2014-12-17
southbridge/amd sb600, sb700 & sb900 spelling fixes
Martin Roth
2014-11-22
amdfam10: Move to per-device ACPI
Vladimir Serbinenko
2014-10-22
cmos: Rename the CMOS related functions.
Gabe Black
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-28
Remove assembly coded log2 function
Ronald G. Minnich
2012-08-05
AMD SB: Call the rtc update if needed (Propagation)
zbao
2012-04-12
Unify IO APIC address specification
Patrick Georgi
2011-02-12
Attached patch fixes the LPC decode ranges of SB600/SB800. We enable early on...
Rudolf Marek
2011-01-20
This sb800 code is derived from sb700.
Zheng Bao