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haswell-mrc
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Some coreboot project code with my work
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sr5650
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Commit message (
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Author
2018-10-23
src: Remove unneeded whitespace
Elyes HAOUAS
2018-10-18
cpu/amd: Use common AMD's MSR
Elyes HAOUAS
2018-09-18
sb/amd/sr5650/sr5650.h: Get rid of device_t
Elyes HAOUAS
2018-07-09
src/southbridge: Use "foo *bar" instead of "foo* bar"
Elyes HAOUAS
2018-06-14
src: Get rid of unneeded whitespace
Elyes HAOUAS
2018-06-14
src: Use of device_t is deprecated
Elyes HAOUAS
2018-06-04
sb/amd/sr5650: Fix invalid function declarations
Kyösti Mälkki
2018-05-23
sb/amd/sr5650: Get rid of device_t
Kyösti Mälkki
2018-05-08
src/southbridge: Add required space before the open parenthesis
Elyes HAOUAS
2017-10-31
AMD boards: Fix function name (soft_reset) in message
Jonathan Neuschäfer
2017-08-28
AGESA f15: Remove f10 references
Kyösti Mälkki
2017-06-30
southbridge/amd: add IS_ENABLED() around Kconfig symbol references
Martin Roth
2016-09-15
southbridge/amd/sr5650/sr5650.c: Update acpi_fill_ivrs
Martin Roth
2016-09-15
amd/sr5650: Update add_ivrs_device_entries
Martin Roth
2016-09-07
include/arch/acpi.h: change IVRS efr field to iommu_feature_info
Martin Roth
2016-08-31
src/southbridge: Code formating
Elyes HAOUAS
2016-07-31
src/southbridge: Capitalize CPU, RAM and ROM
Elyes HAOUAS
2016-01-18
header files: Fix guard name comments to match guard names
Martin Roth
2016-01-04
sb/amd/sr5650: Correctly locate CPU MMCONFIG resource
Timothy Pearson
2015-12-18
southbridge/amd/sr5650: Add MCFG ACPI table support
Timothy Pearson
2015-12-13
amd/[nb/fam10|sb/sr5650]: Minor cosmetic changes
Timothy Pearson
2015-12-08
sb/amd/sr5650: Allow resource allocator to assign bus numbers
Timothy Pearson
2015-11-26
southbridge/amd/sr5650: Use correct PCI configuration block offset
Timothy Pearson
2015-11-23
southbridge/amd/sr5650: Hide clock configuration device after setup is complete
Timothy Pearson
2015-11-23
southbridge/amd/sr5650: Add IOMMU support
Timothy Pearson
2015-11-15
src/southbridge/amd/sr5650: Always configure lane director on startup
Timothy Pearson
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-26
southbridge/amd/sr5650: Add AMD Family 15h CPU support
Timothy Pearson
2015-10-24
southbridge/amd/sr5650: Fix hardcoded printk() function names in pcie.c
Timothy Pearson
2015-10-24
southbridge/amd/sr5650: Fix boot failure on ASUS KGPE-D16
Timothy Pearson
2015-10-24
southbridge/amd/sr5650: Add optional delay after link training
Timothy Pearson
2015-10-23
southbridge/amd/sr5650: Fix GPP3a link training in higher width modes
Timothy Pearson
2015-10-16
southbridge/amd/sr5650: Remove unnecessary register configuration
Timothy Pearson
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-27
kbuild: automatically include southbridges
Stefan Reinauer
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2014-12-17
southbridge/amd amd81XX, cs553X & sr5650 spelling fixes
Martin Roth
2014-12-09
southbridge/amd/sr5650/sr5650.c: Fix bitwise logic and mask in loop
Edward O'Callaghan
2014-07-29
Uniformly spell frequency unit symbol as Hz
Elyes HAOUAS
2013-04-11
AMD RS780, SR5650: PcieTrainPort: Fix typo *i*gnoring in comment
Paul Menzel
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-27
Get rid of drivers class
Patrick Georgi
2012-11-20
Unify use of bool config variables
Stefan Reinauer
2012-08-22
Auto-declare chip_operations
Kyösti Mälkki
2012-05-08
Some more #if cleanup
Patrick Georgi
2012-02-20
Fixes Fam10/SR5650 cpu not recognized message.
Dave Frodin
2011-11-01
remove trailing whitespace
Stefan Reinauer
2011-10-30
Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c.
Stefan Reinauer
2011-07-22
Update AMD SR5650 and SB700
efdesign98
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