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Some coreboot project code with my work
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Age
Commit message (
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Author
2011-10-28
Get rid of the old romstage-as-bootblock ROM layout
Patrick Georgi
2011-10-28
sb600: Implement EHCI workaround
Patrick Georgi
2011-10-27
Added smbus block read/write for amd8111
Oskar Enoksson
2011-10-23
SB800: Hide unused gpp ports
Kerry Sheh
2011-10-15
AMD CPU and chipset fixes for compilation with gcc 4.6
Stefan Reinauer
2011-10-14
Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6
Stefan Reinauer
2011-10-13
amd/sb600: Enable COM2 at all times in early setup
Patrick Georgi
2011-10-12
SB800 RAID: add kconfig option RAID_MISC_ROM_POSITION
Kerry Sheh
2011-10-12
SB800: Sata Enable bus master and enable ahci for AHCI/RAID mode
Kerry Sheh
2011-10-12
sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODE
Kerry Sheh
2011-10-11
mainboard: complete the sb800 devicetree even device is off
Kerry Sheh
2011-10-11
sb800: Add sata ahci/raid mode kconfig option
Kerry Sheh
2011-09-15
AMD SB800 early console use fix
efdesign98
2011-09-14
rs780: hide unused gfx ports and gpp ports
Kerry Sheh
2011-09-07
AMD SB800 southbridge update
Kerry She
2011-09-07
AMD F14 southbridge update
Kerry She
2011-09-04
Adjust some code/comment of sb700 sata init
Wang Qing Pei
2011-07-22
Update AMD SR5650 and SB700
efdesign98
2011-07-14
Move AMD SB800 early clock setup.
Scott Duplichan
2011-07-14
Set SB800 ROM decode size based on kconfig.
Marc Jones
2011-06-29
amd southbirdge sb800 wrapper, pci bridge fix
Kerry She
2011-06-28
Addition of Family12/SB900 wrapper code
efdesign98
2011-06-22
Rename {CPU|NB|SB}/amd/*_wrapper folders
efdesign98
2011-06-20
sb800: move spi prefetch and fast read mode to sb bootblock.
Stefan Reinauer
2011-06-19
ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nic
Scott Duplichan
2011-06-09
Revert changes to set the sb800 to AHCI mode.
Marc Jones
2011-06-07
re-indent, so files conform to coding guidelines.
Stefan Reinauer
2011-06-01
trivial remove blanks at the end of line
Kerry She
2011-06-01
This patch fix a AMD sb800 wrapper compile warning:
Kerry She
2011-05-16
cimx_wrapper/sb800: Fix indent in late.c:sb800_enable()
Peter Stuge
2011-05-15
Update gpp port configuration.
Scott Duplichan
2011-05-15
Program the I/O APIC ID.
Scott Duplichan
2011-05-15
Enable AHCI mode and hide IDE controller to reduce boot time.
Scott Duplichan
2011-05-15
Configure CIMx to use 33 MHz fast mode for SPD read.
Scott Duplichan
2011-05-07
RS780 DDI Lanes configure support,
Kerry She
2011-05-07
SB800 CIMX code can share the AGESA V5 lib code,
Kerry She
2011-04-21
more ifdef -> if fixes.
Stefan Reinauer
2011-04-21
more ifdef -> if fixes
Stefan Reinauer
2011-04-20
drop dead code from sb800 bootblock
Stefan Reinauer
2011-04-19
Fix some more misuses of ifdef/if defined
Stefan Reinauer
2011-04-18
* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value
Stefan Reinauer
2011-04-12
Use TOM2 for highest sysmem setting for northbound memory routing (DMA). This...
Marc Jones
2011-04-11
Unify use of post_code
Alexandru Gagniuc
2011-04-10
In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.
Stefan Reinauer
2011-03-28
Add the SR5650 & SP5100 to the Kconfig and Makefile.inc
Zheng Bao
2011-03-28
SP5100's code is based on SB700. Change the legacy sb700 of sb7xx_51xx.
Zheng Bao
2011-03-27
Add AMD SR56x0 support.
Zheng Bao
2011-03-17
Fix power_on_after_fail handling on AMD SB600
Josef Kellermann
2011-02-26
It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T...
Rudolf Marek
2011-02-24
Add new option 'sata_mode' to CMOS and 'SATA_MODE' to Kconfig for AMD SB600
Josef Kellermann
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