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path: root/src/southbridge/amd
AgeCommit message (Expand)Author
2011-10-23SB800: Hide unused gpp portsKerry Sheh
2011-10-15AMD CPU and chipset fixes for compilation with gcc 4.6Stefan Reinauer
2011-10-14Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6Stefan Reinauer
2011-10-13amd/sb600: Enable COM2 at all times in early setupPatrick Georgi
2011-10-12SB800 RAID: add kconfig option RAID_MISC_ROM_POSITIONKerry Sheh
2011-10-12SB800: Sata Enable bus master and enable ahci for AHCI/RAID modeKerry Sheh
2011-10-12sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODEKerry Sheh
2011-10-11mainboard: complete the sb800 devicetree even device is offKerry Sheh
2011-10-11sb800: Add sata ahci/raid mode kconfig optionKerry Sheh
2011-09-15AMD SB800 early console use fixefdesign98
2011-09-14rs780: hide unused gfx ports and gpp portsKerry Sheh
2011-09-07AMD SB800 southbridge updateKerry She
2011-09-07AMD F14 southbridge updateKerry She
2011-09-04Adjust some code/comment of sb700 sata initWang Qing Pei
2011-07-22Update AMD SR5650 and SB700efdesign98
2011-07-14Move AMD SB800 early clock setup.Scott Duplichan
2011-07-14Set SB800 ROM decode size based on kconfig.Marc Jones
2011-06-29amd southbirdge sb800 wrapper, pci bridge fixKerry She
2011-06-28Addition of Family12/SB900 wrapper codeefdesign98
2011-06-22Rename {CPU|NB|SB}/amd/*_wrapper foldersefdesign98
2011-06-20sb800: move spi prefetch and fast read mode to sb bootblock.Stefan Reinauer
2011-06-19ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nicScott Duplichan
2011-06-09Revert changes to set the sb800 to AHCI mode.Marc Jones
2011-06-07re-indent, so files conform to coding guidelines.Stefan Reinauer
2011-06-01trivial remove blanks at the end of lineKerry She
2011-06-01This patch fix a AMD sb800 wrapper compile warning:Kerry She
2011-05-16cimx_wrapper/sb800: Fix indent in late.c:sb800_enable()Peter Stuge
2011-05-15Update gpp port configuration.Scott Duplichan
2011-05-15Program the I/O APIC ID.Scott Duplichan
2011-05-15Enable AHCI mode and hide IDE controller to reduce boot time.Scott Duplichan
2011-05-15Configure CIMx to use 33 MHz fast mode for SPD read.Scott Duplichan
2011-05-07RS780 DDI Lanes configure support,Kerry She
2011-05-07SB800 CIMX code can share the AGESA V5 lib code,Kerry She
2011-04-21more ifdef -> if fixes.Stefan Reinauer
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-20drop dead code from sb800 bootblockStefan Reinauer
2011-04-19Fix some more misuses of ifdef/if definedStefan Reinauer
2011-04-18* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that valueStefan Reinauer
2011-04-12Use TOM2 for highest sysmem setting for northbound memory routing (DMA). This...Marc Jones
2011-04-11Unify use of post_codeAlexandru Gagniuc
2011-04-10In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.Stefan Reinauer
2011-03-28Add the SR5650 & SP5100 to the Kconfig and Makefile.incZheng Bao
2011-03-28SP5100's code is based on SB700. Change the legacy sb700 of sb7xx_51xx.Zheng Bao
2011-03-27Add AMD SR56x0 support.Zheng Bao
2011-03-17Fix power_on_after_fail handling on AMD SB600Josef Kellermann
2011-02-26It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T...Rudolf Marek
2011-02-24Add new option 'sata_mode' to CMOS and 'SATA_MODE' to Kconfig for AMD SB600Josef Kellermann
2011-02-15SERIAL_POST was renamed to CONSOLE_POST a while agoStefan Reinauer
2011-02-14Removed LPC DMA Deadlock workaround...Josef Kellermann
2011-02-14 This code provides southbridge initialization for SB800 south bridges. It is...Frank Vibrans
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