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path: root/src/southbridge/amd
AgeCommit message (Expand)Author
2009-07-14trivial fixes to function declarations (and build system test)Stefan Reinauer
2009-07-10This seems to be a more official, common, simple way to check if the CPU is d...Zheng Bao
2009-07-02Move the v3 resource allocator to v2.Myles Watson
2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
2009-06-05After I modify the pci_ext_read_config32 and pci_ext_read_config32, the step 6aZheng Bao
2009-06-04This patch is about some noticable bugs which was made by no reason.Zheng Bao
2009-06-03Revert "CMOS: Add set_option and rework get_option."Luc Verhaegen
2009-06-03CMOS: Add set_option and rework get_option.Luc Verhaegen
2009-06-03Modify it based on the RPR 5.7.7. Switching GGSP Configuration By Register Pr...Zheng Bao
2009-03-06use include file for i8259 where appropriate (trivial)Stefan Reinauer
2009-03-04I just went on a bugfix frenzy and fixed all printk format warningsCarl-Daniel Hailfinger
2009-02-28coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3Stefan Reinauer
2009-02-15- Fix up amd pistachio and dbm690t.Stefan Reinauer
2009-02-12This patch converts __FUNCTION__ to __func__, since __func__ is standard.Myles Watson
2009-02-05Use the correct device for switching on HDA.Dan Lykowski
2009-01-23Fix rs690 bug about GPPSB configuration.Maggie Li
2009-01-15Adds a retry/faildown to SB600 SATA detection logic.Dan Lykowski
2008-12-29The SB600 RPR documentation does not mention what to do if SATA_BAR0+6Carl-Daniel Hailfinger
2008-12-23Handle RS690 quirks for 1 GHz noncoherent HyperTransport.Carl-Daniel Hailfinger
2008-12-23Fix implicit declarations of pci_read_config32 and pci_write_config32 inMaggie Li
2008-12-18This patch gets rid of all the implicit definition warnings for serengeti exc...Myles Watson
2008-12-17Add 690G and 690(MT) internal graphics support.Zheng Bao
2008-12-13Move mainboard specific changes to the coreboot memory table into theStefan Reinauer
2008-12-12Improve comments in early SB600 setup, handle non-LPC strapping andCarl-Daniel Hailfinger
2008-12-01Add AMD rs690 VID DID reporting and some minor cleanups.Joe Bao
2008-12-01Add AMD sb600 HPET setup and some minor cleanups.Joe Bao
2008-11-14drop dead code in sb600 hdaStefan Reinauer
2008-10-21I/O ports are 16bit, so change 'unsigned long port_base' to 'u16 port_base'.Uwe Hermann
2008-10-21Add missing license header.Uwe Hermann
2008-10-13Move AMD RS690 and SB600 PCI IDs to pci_ids.h where they should be.Uwe Hermann
2008-10-09Added comment about sb600 wideio setting for clarity and a minor witespace c...Marc Jones
2008-10-07[PATCH] coreboot: Don't loop forever waiting for HDA codecsJordan Crouse
2008-10-03Ron has been doing really good work over in v3. The problem is that the work ...Marc Jones
2008-10-02This is so that people can see it. This is the sb600 for v3. It almost Ronald G. Minnich
2008-10-01The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots ofCarl-Daniel Hailfinger
2008-09-22Patch for AMD SB600 chipset.Michael Xie
2008-09-22Patch for AMD RS690 chipset.Michael Xie
2008-07-12There was a programming error which made most USB port4 setup wrong. This pat...Marc Jones
2008-05-06cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doi...Marc Jones
2008-03-29Now coreboot performs IRQ routing for some boards.Nikolay Petukhov
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
2007-12-19Additional early AMD8111 southbridge support for Barcelona platforms.Marc Jones
2007-10-24Ever wondered where those "setting incorrect section attributes forStefan Reinauer
2007-10-07Fix some issues with spaces in the code and Doxygen style documentation.Juergen Beisert
2007-10-05This patch will add support for the Geode GX1/CS5530 VGA feature. It's ableJuergen Beisert
2007-09-14This is a full rewrite of all the CS5530/CS5530A code. The previous code wasUwe Hermann
2007-06-19The GPIOs used for UART2 RX and TX were reversed.Marc Jones
2007-06-02The UART disable code was causing a hang and was worked around with aMarc Jones
2007-05-24Drop the src/southbridge/amd/cs5536_lx directory and its contents, asUwe Hermann
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