index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
southbridge
/
amd
Age
Commit message (
Expand
)
Author
2012-04-19
Do not produce temp s3.rom if the board doesn't need it.
zbao
2012-04-17
More portable s3 scratch space creation
Patrick Georgi
2012-04-12
Add Southbridge support for S3.
zbao
2012-04-12
Unify IO APIC address specification
Patrick Georgi
2012-04-02
Add sb800 spi support.
zbao
2012-03-07
Move C labels to start-of-line
Patrick Georgi
2012-02-29
AMD southbridge: remove sp5100
Kyösti Mälkki
2012-02-22
amd/sb600: Move HAVE_HARD_RESET to southbridge
Patrick Georgi
2012-02-20
Force SB600 bootblock to use I/O for PCI config
Dave Frodin
2012-02-20
Force SB700 bootblock code to use I/O for PCI config cycles.
Dave Frodin
2012-02-20
Force SB800 bootblock to use I/O for PCI config
Dave Frodin
2012-02-20
Fixes Fam10/SR5650 cpu not recognized message.
Dave Frodin
2012-02-17
amd/sb700: Move HAVE_HARD_RESET to southbridge
Patrick Georgi
2012-02-17
amd/sb800: Move HAVE_HARD_RESET to southbridge
Patrick Georgi
2012-02-17
amd/amd8111: Move HAVE_HARD_RESET to southbridge
Patrick Georgi
2012-02-16
SB700 southbridge: AMD SB700/SP5100 southbridge CIMX wrapper
Kerry Sheh
2012-02-02
CIMX wrapper: remove redudant traversing sb800 and sb900 CIMX dir
Kerry Sheh
2012-01-08
rs780: correct comment in switching_gpp_configurations()
Jonathan A. Kollasch
2012-01-05
rs780: use bitwise rather than boolean not
Jonathan A. Kollasch
2012-01-05
rs780: power down GPPSB SB lane pads in correct PCIe core
Jonathan A. Kollasch
2011-12-21
Persimmon audio codec verb patch.
Marc Jones
2011-12-06
Fix AMD 8132 and 8151 southbridge builds
Kyösti Mälkki
2011-12-05
RS780: print the vgainfo
Denis 'GNUtoo' Carikli
2011-11-01
remove trailing whitespace
Stefan Reinauer
2011-10-31
Fix usb debug dongle support
Sven Schnelle
2011-10-30
Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c.
Stefan Reinauer
2011-10-28
Get rid of the old romstage-as-bootblock ROM layout
Patrick Georgi
2011-10-28
sb600: Implement EHCI workaround
Patrick Georgi
2011-10-27
Added smbus block read/write for amd8111
Oskar Enoksson
2011-10-23
SB800: Hide unused gpp ports
Kerry Sheh
2011-10-15
AMD CPU and chipset fixes for compilation with gcc 4.6
Stefan Reinauer
2011-10-14
Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6
Stefan Reinauer
2011-10-13
amd/sb600: Enable COM2 at all times in early setup
Patrick Georgi
2011-10-12
SB800 RAID: add kconfig option RAID_MISC_ROM_POSITION
Kerry Sheh
2011-10-12
SB800: Sata Enable bus master and enable ahci for AHCI/RAID mode
Kerry Sheh
2011-10-12
sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODE
Kerry Sheh
2011-10-11
mainboard: complete the sb800 devicetree even device is off
Kerry Sheh
2011-10-11
sb800: Add sata ahci/raid mode kconfig option
Kerry Sheh
2011-09-15
AMD SB800 early console use fix
efdesign98
2011-09-14
rs780: hide unused gfx ports and gpp ports
Kerry Sheh
2011-09-07
AMD SB800 southbridge update
Kerry She
2011-09-07
AMD F14 southbridge update
Kerry She
2011-09-04
Adjust some code/comment of sb700 sata init
Wang Qing Pei
2011-07-22
Update AMD SR5650 and SB700
efdesign98
2011-07-14
Move AMD SB800 early clock setup.
Scott Duplichan
2011-07-14
Set SB800 ROM decode size based on kconfig.
Marc Jones
2011-06-29
amd southbirdge sb800 wrapper, pci bridge fix
Kerry She
2011-06-28
Addition of Family12/SB900 wrapper code
efdesign98
2011-06-22
Rename {CPU|NB|SB}/amd/*_wrapper folders
efdesign98
2011-06-20
sb800: move spi prefetch and fast read mode to sb bootblock.
Stefan Reinauer
[next]