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Some coreboot project code with my work
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southbridge
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vortex86ex
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southbridge.c
Age
Commit message (
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Author
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-04
devicetree: Discriminate device ops scan_bus()
Kyösti Mälkki
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-12-07
southbridge/dmp/vortex86ex/southbridge.c: Silence bitwise op warns
Edward O'Callaghan
2014-10-22
cmos: Rename the CMOS related functions.
Gabe Black
2014-07-28
dmp/vortex86ex/southbridge.c: Do not access arrays out of bound
Daniele Forsi
2014-05-13
src/drivers/pc80: Remove empty struct keyboard
Edward O'Callaghan
2014-02-17
vortex86ex: Drop baudrate programming for 10 UARTs
Kyösti Mälkki
2014-01-23
dmp/vortex86ex: Initialize I2C controller base address/IRQ
Andrew Wu
2013-12-22
vortex86ex: Change PCI S/B resource reservation functions for more I/O devices.
Andrew Wu
2013-11-30
dmp/vortex86ex: Add timeout for keyboard system flag checking.
Andrew Wu
2013-11-24
dmp/vortex86ex: Move DMP specific POST code defines into one file
Andrew Wu
2013-10-22
vortex86ex: Defer checking PS/2 keyboard controller system flag
Andrew Wu
2013-10-13
dmp/vortex86ex: Initialize PS/2 keyboard.
Andrew Wu
2013-07-10
Vortex86EX southbridge routes more built-in PCI device IRQs.
Andrew Wu
2013-07-03
Add support for DMP Vortex86EX PCI southbridge.
Andrew Wu