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coreboot
2560p
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broadwell_refcode
e6230
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haswell-mrc
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Some coreboot project code with my work
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intel
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bd82x6x
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lpc.c
Age
Commit message (
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Author
2017-08-30
sb/intel/*: add option to lockdown chipset on normal boot path
Bill XIE
2017-07-16
southbridge/intel: add IS_ENABLED() around Kconfig symbol references
Martin Roth
2017-06-27
sb/intel/bd82x6x: Fill in acpi_name
Patrick Rudolph
2017-05-01
nb/intel/sandybridge/gma: Set up OpRegion in nb code
Patrick Rudolph
2016-10-07
src/southbridge: Remove whitespace after sizeof
Elyes HAOUAS
2016-08-31
src/southbridge: Code formating
Elyes HAOUAS
2016-01-03
sb/intel/bd82x6x: Add missing PCIIDs for variants .
Vladimir Serbinenko
2015-11-04
sb/intel/bd82x6x: Assign unique bus/dev/fn for I/O APIC + HPETs
Nico Huber
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-16
intel/southbridge/bd82x6x: Add option to set SPI VSCC registers
Nico Huber
2015-06-05
device_ops: add device_t argument to acpi_fill_ssdt_generator
Alexander Couzens
2015-06-05
device_ops: add device_t argument to acpi_inject_dsdt_generator
Alexander Couzens
2015-06-04
devicetree: Discriminate device ops scan_bus()
Kyösti Mälkki
2015-05-29
bd82x6x: Move calling of finalize() on resume to southbridge code
Vladimir Serbinenko
2015-05-28
Migrate 206ax to SMM_MODULES
Vladimir Serbinenko
2015-05-28
igd.asl rewrite
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-28
intel SMI handlers: Refactor GPI SMI/SCI routing
Kyösti Mälkki
2015-04-20
southbridge/intel/bd82x6x: Add LPC id 0x1e49 for B75 chipset
Damien Zammit
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2014-11-23
sandy/ivy/nehalem: Remerge interrupt handling
Vladimir Serbinenko
2014-11-19
i82801ix,bd82x6x,ibexpeak: rewrite expresscard hotplug
Vladimir Serbinenko
2014-11-09
ibexpeak, bd82x6x: Move to implicit length patching
Vladimir Serbinenko
2014-11-08
bd82x6x: Move to common FADT.
Vladimir Serbinenko
2014-10-22
cmos: Rename the CMOS related functions.
Gabe Black
2014-10-17
bd82x6x: Consolidate common GNVS init
Vladimir Serbinenko
2014-10-11
bd82x6x, ibexpeak, lynxpoint: Declare NVSA before its use.
Vladimir Serbinenko
2014-10-10
bd82x6x, ibexpeak, lynxpoint: Ensure 0-filling of uninited GNVS vars.
Vladimir Serbinenko
2014-09-13
southbridge/bd82x6x: Reserve 16 MiB for flash and not 8.
Vladimir Serbinenko
2014-09-11
Move nehalem/sandy/ivy to per-device acpi
Vladimir Serbinenko
2014-07-08
southbridge: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2014-06-21
intel boards: Use acpi_is_wakeup_s3()
Kyösti Mälkki
2013-06-03
Intel BD82x6x: LPC: Unify I/O APIC setup
Paul Menzel
2013-04-16
Intel Panther Point PCH: Use 2 << 24 to clarify that APIC ID is 2
Vladimir Serbinenko
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-07-26
Reserve bd82x6x LPC decode ranges in the resource allocator
Marc Jones
2012-07-25
ELOG: Log boot-time events found in southbridge
Duncan Laurie
2012-07-25
CougarPoint/PantherPoint: Add HM77 device ID to table
Kimarie Hoot
2012-07-24
Add specific power management init code for PantherPoint
Duncan Laurie
2012-07-24
bd82x6x: Convert all PCI ID lists to new scheme
Stefan Reinauer
2012-07-24
Add support for HM70 and NM70 LPC bridge
Stefan Reinauer
2012-05-01
Don't disable ACPI in the S3 resume path
Duncan Laurie
2012-05-01
add new LPC controller device ID value
Vadim Bendebury
2012-04-04
Add support for Intel Panther Point PCH
Stefan Reinauer