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Some coreboot project code with my work
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southbridge
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intel
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bd82x6x
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usb_xhci.c
Age
Commit message (
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Author
2020-04-04
src/southbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2019-08-21
southbridge/intel: Tidy up preprocessor and headers
Kyösti Mälkki
2019-03-21
{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()
Subrata Banik
2019-03-04
arch/io.h: Drop unnecessary include
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2018-06-04
sb/intel/bd82x6x: Get rid of device_t
Elyes HAOUAS
2017-09-14
device: acpi_name() should take a const struct device
Aaron Durbin
2017-06-27
sb/intel/bd82x6x: Fill in acpi_name
Patrick Rudolph
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-20
southbrige/intel/bd82x6x: add XHCI overcurrent map config
Nicolas Reinecke
2015-04-19
southbrige/intel/bd82x6x: XHCI replace magic values
Nicolas Reinecke
2015-02-01
bd82x6x/xhci: Set mask of ports switchable between USB2 and USB3.
Vladimir Serbinenko
2014-02-06
usbdebug: Move under drivers/usb
Kyösti Mälkki
2013-03-17
Pantherpoint: Add XHCI device init
Duncan Laurie