index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
southbridge
/
intel
/
fsp_i89xx
Age
Commit message (
Expand
)
Author
2017-05-01
nb/intel/fsp_sandybridge/gma: Set up OpRegion in nb code
Patrick Rudolph
2017-01-12
fsp 1.0 systems: Check for NULL when saving HobListPtr
Martin Roth
2016-12-06
intel PCI ops: Remove explicit PCI MMCONF access
Kyösti Mälkki
2016-12-06
intel PCI ops: Remove explicit PCI MMCONF access
Kyösti Mälkki
2016-10-07
src/southbridge: Remove whitespace after sizeof
Elyes HAOUAS
2016-08-31
src/southbridge: Code formating
Elyes HAOUAS
2016-08-28
src/southbridge: Add required space before opening parenthesis '('
Elyes HAOUAS
2016-08-01
Remove non-ascii & unprintable characters
Martin Roth
2016-07-31
Remove extra newlines from the end of all coreboot files.
Martin Roth
2016-07-21
timestamp: Drop duplicate TS_END_ROMSTAGE entries
Kyösti Mälkki
2016-07-15
southbridge/intel/fsp_i89xx: use common Intel ACPI hardware definitions
Aaron Durbin
2016-06-29
intel romstage: Use run_ramstage()
Kyösti Mälkki
2016-01-13
tree: drop last paragraph of GPL copyright header from new files
Martin Roth
2016-01-07
Correct some common spelling mistakes
Martin Roth
2015-12-10
ACPI: Fix IASL Warning about unused method for _TZ checks
Martin Roth
2015-12-06
southbridge/intel/fspi89xx: Don't include common/firmware makefile
Martin Roth
2015-11-19
x86: Add Kconfig to disable early bootblock postcodes
Martin Roth
2015-11-10
southbridge/intel: Add FSP based i89xx southbridge support
Marc Jones