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path: root/src/southbridge/intel/i3100
AgeCommit message (Expand)Author
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-06-17Always enable parent resources before child resources.Myles Watson
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
2010-03-31Drop \r\n and \n\r as both print_XXX and printk now do this internally.Stefan Reinauer
2010-03-22Fix all the format string warnings.Myles Watson
2010-03-22drop some unused files and fix warnings on i945 based systems.Stefan Reinauer
2010-03-22printk_foo -> printk(BIOS_FOO, ...)Stefan Reinauer
2010-03-16pci drivers should be const.Stefan Reinauer
2010-02-22This is a general cleanup patchStefan Reinauer
2010-02-15Various license header consistency fixes (trivial).Uwe Hermann
2010-02-07newconfig is no more.Patrick Georgi
2010-01-18Move all IOAPIC selection to southbridges, and remove themPatrick Georgi
2010-01-16coreboot has 13 instances of IOAPIC setup distributed across a lotStefan Reinauer
2009-10-09Remove default n statements to simplify .config and ldoptions files.Myles Watson
2009-09-25some progress on kconfig:Patrick Georgi
2009-08-28This patch adds VGA and PS/2 Keyboard/mouse support to the already existing i...Arnaud Maye
2009-07-02Move the v3 resource allocator to v2.Myles Watson
2009-07-01Add support for the Intel Eagle Heights development board.Thomas Jourdan
2009-06-03Revert "CMOS: Add set_option and rework get_option."Luc Verhaegen
2009-06-03CMOS: Add set_option and rework get_option.Luc Verhaegen
2009-02-28coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3Stefan Reinauer
2008-09-03Tidy up identifiers, per Uwe's suggestion. Trivial.Ed Swierk
2008-08-25This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,Ed Swierk
2008-08-25This patch modifies the Intel 3100 southbridge code to recognize theEd Swierk
2008-05-07Implement GPIO configuration routines for the Intel 3100 southbridge,Ed Swierk
2008-04-30By default, the Intel 3100 LPC interface enables only I/O range 0x3f8Ed Swierk
2008-04-01Setting an integrated southbridge device (like SATA or USB2.0) toEd Swierk
2008-04-01Tiny style fix for consistency (trivial).Ed Swierk
2008-04-01The early init code of several Intel southbridge chipsets callsEd Swierk
2008-03-30Like other Intel chipsets, the Intel 3100 has a TCO timer that rebootsEd Swierk
2008-03-16Here is an updated patch addressing most of Uwe's and Peter's ...Ed Swierk