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Some coreboot project code with my work
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southbridge
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intel
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i82371eb
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bootblock.c
Age
Commit message (
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Author
2020-03-03
sb/intel/i82371eb: Enable upper NVRAM bank
Keith Hui
2019-12-14
bootblock: Provide some common prototypes
Kyösti Mälkki
2019-11-25
cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-03-04
arch/io.h: Drop unnecessary include
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2019-02-11
device/pci_ops: Move questionable pci_locate() variants
Kyösti Mälkki
2017-11-03
sb/intel/i82371eb: Consolidate bootblock.c logic
Keith Hui
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-11-05
soutbridge/*/bootblock: Use pci_dev_t over device_t typedef
Edward O'Callaghan
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2010-12-09
Merge enable_rom.c files into bootblock.c files.
Uwe Hermann
2010-12-08
first round name simplification. drop the <component>_ prefix.
stepan
2010-10-07
Convert all Intel 82371AB/EB/MB based boards to TINY_BOOTBLOCK.
Uwe Hermann