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Some coreboot project code with my work
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southbridge
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intel
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i82371eb
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i82371eb.h
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2018-05-14
sb/intel/i82371eb: Get rid of device_t
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-12-18
i82371eb & qemu: Move to per-device ACPI.
Vladimir Serbinenko
2013-05-10
Drop prototype guarding for romcc
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2011-04-10
In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.
Stefan Reinauer
2010-12-07
Get rid of some unneeded function prototypes in romstage.c files.
Uwe Hermann
2010-11-29
Tobias Diedrich wrote:
Tobias Diedrich
2010-11-27
After finding the missing bit poweroff works now.
Tobias Diedrich
2010-10-09
Remove various .c #includes from Intel 440BX/82371EB boards.
Uwe Hermann
2010-09-19
Make ASUS P3B-F RAM init actually work by enabling SPD access.
Uwe Hermann
2010-03-28
drop __ROMCC__ define checks.. __PRE_RAM__ is what the code should be looking...
Stefan Reinauer
2009-11-06
Split the two usages of __ROMCC__:
Myles Watson
2009-10-27
Add few missing prototypes, and remove few unused (thus lonelly) variables.
Maciej Pijanka
2008-01-18
Please bear with me - another rename checkin. This qualifies as trivial, no
Stefan Reinauer
2007-11-30
Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):
Uwe Hermann
2007-06-03
Intel 82371EB: Some code simplifications (trivial).
Uwe Hermann
2007-05-29
Intel 82371EB: Add IDE init support.
Uwe Hermann
2007-05-27
Init for the Intel 82371EB southbridge: make all ROM/BIOS regions
Uwe Hermann
2007-05-03
Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,
Uwe Hermann