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coreboot
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broadwell_refcode
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Some coreboot project code with my work
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southbridge
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intel
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i82801gx
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bootblock.c
Age
Commit message (
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Author
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2019-12-14
bootblock: Provide some common prototypes
Kyösti Mälkki
2019-11-15
nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-05-13
i82801gx/bootblock: Use macro instead of magic number
Elyes HAOUAS
2019-03-04
arch/io.h: Drop unnecessary include
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2019-01-09
cpu/intel: Use the common code to initialize the romstage timestamps
Arthur Heymans
2016-08-31
src/southbridge: Code formating
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-07-07
timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS
Aaron Durbin
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2014-12-03
i82801gx: Enable upper CMOS in bootblock.
Vladimir Serbinenko
2014-11-05
soutbridge/*/bootblock: Use pci_dev_t over device_t typedef
Edward O'Callaghan
2014-07-08
southbridge: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2013-06-19
intel/i82801gx: Store initial timestamp
Nico Huber
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2011-05-03
i82801gx: enable SPI prefetching
Sven Schnelle