coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-01	sb/intel/i82801ix: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-04-05	Drop explicit NULL initializations from `device_operations`	Elyes HAOUAS
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-11-22	sb/i82801ix: Use macros instead of hard-coded IDs	Felix Singer
2019-08-21	southbridge/intel: Tidy up preprocessor and headers	Kyösti Mälkki
2019-03-21	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	Subrata Banik
2019-03-04	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki
2019-01-07	src: Use "foo bar" instead of "foo bar"	Elyes HAOUAS
2018-12-05	sb/intel: Fix pointer casts	Patrick Rudolph
2018-05-24	sb/intel/i82801ix: Get rid of device_t	Elyes HAOUAS
2016-08-31	src/southbridge: Code formating	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-09-13	azalia: Shrink boilerplate	Vladimir Serbinenko
2014-07-08	southbridge: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2013-09-10	intel/i82801ix: remove explicit pcie config accesses	Kyösti Mälkki
2013-08-02	Remove unnecessary space characters.	Andrew Wu
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-11-27	intel/i82801ix: new southbridge, ICH9	Patrick Georgi