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path: root/src/southbridge/intel/i82801ix/i82801ix.c
AgeCommit message (Expand)Author
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-01sb/intel/i82801ix: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-04-04src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2019-12-19src/southbridge: Remove unused <stdlib.h>Elyes HAOUAS
2019-10-30src/southbridge: change "unsigned" to "unsigned int"Martin Roth
2019-08-21southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-01-06device: Use pcidev_path_on_root()Kyösti Mälkki
2019-01-06device: Use pcidev_on_root()Kyösti Mälkki
2018-08-16sb/intel/i82801[ij]x: do not set Chipset Initialization Register (CIR) 5Stefan Tauner
2018-08-14sb/intel/i82801[ij]x: use (more) RCBA register names instead of magic numbersStefan Tauner
2018-05-24sb/intel/i82801ix: Get rid of device_tElyes HAOUAS
2017-07-16southbridge/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2016-12-07PCI ops: MMCONF_SUPPORT_DEFAULT is requiredKyösti Mälkki
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-08-12gm45: Move S3 detection to enable stage.Vladimir Serbinenko
2013-09-10intel/i82801ix: remove explicit pcie config accessesKyösti Mälkki
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-11-27intel/i82801ix: new southbridge, ICH9Patrick Georgi