summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801ix/i82801ix.h
AgeCommit message (Expand)Author
2020-04-04src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-14sb/intel/common: Declare common smbus_base() and enable_smbus()Kyösti Mälkki
2019-10-30src/southbridge: change "unsigned" to "unsigned int"Martin Roth
2019-10-14sb/intel/i82801ix: Add common code to set up LPC IO decode rangesArthur Heymans
2019-08-21southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki
2019-07-10intel/i82801ix: Rename smm_lock() prototypeKyösti Mälkki
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-01-14sb/intel: Use common RCBA MACROsPeter Lemenkov
2019-01-06Kconfig: Unify power-after-failure optionsNico Huber
2018-08-14sb/intel/i82801[ij]x: use (more) RCBA register names instead of magic numbersStefan Tauner
2018-06-21sb/intel/i82801xx: Use common RCBA MACROsArthur Heymans
2017-08-06sb/intel/*: Use common SMBus functionsArthur Heymans
2016-12-11intel/gm45: Use romstage_handoff for S3Kyösti Mälkki
2016-01-07Correct some common spelling mistakesMartin Roth
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-07-12Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED()Martin Roth
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-03src/southbridge/intel/i82801ix: Add GPIO register locationsTimothy Pearson
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2014-08-11i82801ix: Declare gen decode registers.Vladimir Serbinenko
2013-10-01qemu: q35: avoid address conflictGerd Hoffmann
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-11-27intel/i82801ix: new southbridge, ICH9Patrick Georgi