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Some coreboot project code with my work
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sata.c
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Commit message (
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Author
2019-08-21
southbridge/intel: Tidy up preprocessor and headers
Kyösti Mälkki
2019-05-29
src/southbridge: Add missing 'include <types.h>'
Elyes HAOUAS
2019-03-21
{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()
Subrata Banik
2019-03-04
device/mmio.h: Add include file for MMIO ops
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2019-01-06
device: Use pcidev_on_root()
Kyösti Mälkki
2018-12-05
sb/intel: Fix pointer casts
Patrick Rudolph
2018-05-24
sb/intel/i82801ix: Get rid of device_t
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2014-07-30
i82801ix: Allow configuration of SATA mode in CMOS.
Vladimir Serbinenko
2014-07-08
southbridge: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-27
intel/i82801ix: new southbridge, ICH9
Patrick Georgi