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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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path:
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src
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southbridge
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intel
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i82801ix
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thermal.c
Age
Commit message (
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Author
2020-06-12
sb/intel/i82801ix: Use PCI bitwise ops
Angel Pons
2020-06-06
src: Use pci_dev_ops_pci where applicable
Angel Pons
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-05
Drop explicit NULL initializations from `device_operations`
Elyes HAOUAS
2020-04-04
src/southbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2019-11-22
sb/i82801ix: Use macros instead of hard-coded IDs
Felix Singer
2019-03-21
{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()
Subrata Banik
2019-03-04
device/mmio.h: Add include file for MMIO ops
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2019-01-06
device: Use pcidev_on_root()
Kyösti Mälkki
2018-05-24
sb/intel/i82801ix: Get rid of device_t
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-27
intel/i82801ix: new southbridge, ICH9
Patrick Georgi