coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-01	sb/intel/i82801ix: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-04-05	Drop explicit NULL initializations from `device_operations`	Elyes HAOUAS
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-11-22	sb/i82801ix: Use macros instead of hard-coded IDs	Felix Singer
2019-10-30	src/southbridge: change "unsigned" to "unsigned int"	Martin Roth
2019-03-21	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	Subrata Banik
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2018-05-24	sb/intel/i82801ix: Get rid of device_t	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-02-06	usbdebug: Move under drivers/usb	Kyösti Mälkki
2013-07-01	usbdebug: Drop duplicates of EHCI BAR relocation code	Kyösti Mälkki
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-11-27	intel/i82801ix: new southbridge, ICH9	Patrick Georgi