| Age | Commit message (Expand) | Author |
|---|
| 2020-02-24 | treewide: Capitalize 'CMOS' | Elyes HAOUAS |
| 2020-01-14 | sb/intel/common: Declare common smbus_base() and enable_smbus() | Kyösti Mälkki |
| 2020-01-14 | intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() call | Kyösti Mälkki |
| 2020-01-09 | sb/intel/common: Add smbus_host_reset() | Kyösti Mälkki |
| 2020-01-09 | device,sb/intel: Move SMBus host controller prototypes | Kyösti Mälkki |
| 2020-01-09 | drivers/pc80/rtc: Separate {get|set}_option() prototypes | Kyösti Mälkki |
| 2019-12-19 | src/southbridge: Remove unused <stdlib.h> | Elyes HAOUAS |
| 2019-12-18 | src: Remove unused 'include <pc80/mc146818rtc.h>' | Elyes HAOUAS |
| 2019-12-14 | bootblock: Provide some common prototypes | Kyösti Mälkki |
| 2019-11-26 | sb/intel/common/spi: Add Baytrail/Braswell support | Arthur Heymans |
| 2019-11-18 | sb/intel/common: Properly guard USB debug | Arthur Heymans |
| 2019-11-15 | nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
| 2019-11-14 | sb/intel/i82801jx: Move early sb init to a common place | Arthur Heymans |
| 2019-11-13 | sb/intel/i82801gx,ix,jx: Move HAVE_SMI_HANDLER conditional | Kyösti Mälkki |
| 2019-11-13 | sb/intel: Remove ENABLE_ACPI_MODE_IN_COREBOOT | Kyösti Mälkki |
| 2019-11-13 | sb/intel/i82801jx: Enable upper 128bytes of CMOS | Arthur Heymans |
| 2019-11-12 | sb/intel/i82801jx: Add common code for LPC decode | Arthur Heymans |
| 2019-11-10 | sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol | Arthur Heymans |
| 2019-11-10 | sb/intel/common: Make COMMON_RESET optional | Arthur Heymans |
| 2019-11-10 | sb/intel/common: Make linking rtc.c conditional | Arthur Heymans |
| 2019-11-04 | sb/intel: Use defined CONFIG_HPET_ADDRESS | Elyes HAOUAS |
| 2019-11-04 | sb/intel/i82801jx/nvs.h: include required header | Arthur Heymans |
| 2019-11-04 | sb/intel: Move 'smbus.asl' to common place | Elyes HAOUAS |
| 2019-11-01 | soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi | Subrata Banik |
| 2019-10-30 | sb/intel/common: Make linking pmbase.c conditional | Arthur Heymans |
| 2019-10-30 | src/southbridge: change "unsigned" to "unsigned int" | Martin Roth |
| 2019-10-08 | device: Use scan_static_bus() over scan_lpc_bus() | Nico Huber |
| 2019-10-01 | intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL | Kyösti Mälkki |
| 2019-08-21 | southbridge/intel: Tidy up preprocessor and headers | Kyösti Mälkki |
| 2019-07-17 | intel/i82801gx,i82801jx: Rename lock_smm() | Kyösti Mälkki |
| 2019-07-09 | arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class | Kyösti Mälkki |
| 2019-05-29 | src/southbridge: Add missing 'include <types.h>' | Elyes HAOUAS |
| 2019-05-13 | {bd82x6x,i82801gx,ibexpeak,lynxpoint}: Remove dead code and use macro | Elyes HAOUAS |
| 2019-05-07 | sb/{ICH7,NM10,PCH}: Use common watchdog_off function | Elyes HAOUAS |
| 2019-04-13 | sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB | Patrick Rudolph |
| 2019-03-25 | sb/intel/{i82801g/i/j,bd82x6x}: Make use of generic set_subsystem() | Kyösti Mälkki |
| 2019-03-21 | {northbridge, soc, southbridge}/intel: Make use of generic set_subsystem() | Subrata Banik |
| 2019-03-21 | {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() | Subrata Banik |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-03-07 | mb/{asus/p5qc,intel/dg43gt}: Remove unneeded include i82801jx.h | Elyes HAOUAS |
| 2019-03-04 | device/mmio.h: Add include file for MMIO ops | Kyösti Mälkki |
| 2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
| 2019-03-01 | device/pci: Fix PCI accessor headers | Kyösti Mälkki |
| 2019-03-01 | ACPI: Rename FADT model and set it to zero | Elyes HAOUAS |
| 2019-02-01 | sb/intel/common: Rename i2c_block_read() to i2c_eeprom_read() | Kyösti Mälkki |
| 2019-01-23 | nb/intel/x4x: Use parallel MP init | Arthur Heymans |
| 2019-01-14 | sb/intel: Use common RCBA MACROs | Peter Lemenkov |
| 2019-01-13 | sb/intel: Check for NULL-return of pcidev_on_root() | Nico Huber |
| 2019-01-09 | cpu/intel: Use the common code to initialize the romstage timestamps | Arthur Heymans |
| 2019-01-07 | src: Use "foo **bar" instead of "foo ** bar" | Elyes HAOUAS |
