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Some coreboot project code with my work
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sata.c
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Author
2019-05-29
src/southbridge: Add missing 'include <types.h>'
Elyes HAOUAS
2019-03-21
{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()
Subrata Banik
2019-03-04
device/mmio.h: Add include file for MMIO ops
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2018-05-18
sb/intel/ibexpeak: Get rid of device_t
Elyes HAOUAS
2016-08-31
src/southbridge: Code formating
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-02
southbridge/ibexpeak: use new ssdt sata port generator
Alexander Couzens
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-24
Intel ibexpeak: Fix SATA configuration
Kyösti Mälkki
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2014-02-17
ibexpeak/sata: Add PCI ID from Easynote LM.
Vladimir Serbinenko
2014-01-12
ibexpeak / bd82x6x: Make SATA mode user-visible option.
Vladimir Serbinenko
2014-01-12
ibexpeak: Fix timings for IDE mode.
Vladimir Serbinenko
2013-12-03
ibexpeak: ensure config compatibility with bd82x6x
Vladimir Serbinenko
2013-11-25
Support for Ibexpeak southbridge
Vladimir Serbinenko
2013-06-13
Revert "Add support for Intel Ibex Peak (Mobile 5) southbridge"
Stefan Reinauer
2013-06-12
Add support for Intel Ibex Peak (Mobile 5) southbridge
Stefan Reinauer