coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-08-17	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	Elyes HAOUAS
2020-06-06	src: Use pci_dev_ops_pci where applicable	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-09	sb/ibexpeak: Use .device for single PCI ID	Felix Singer
2020-04-05	Drop explicit NULL initializations from `device_operations`	Elyes HAOUAS
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-20	sb/ibexpeak: Use macros instead of hard-coded IDs	Felix Singer
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-09-15	southbridge: Remove unused include <device/pci_ops.h>	Elyes HAOUAS
2019-03-21	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	Subrata Banik
2019-03-04	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2018-05-18	sb/intel/ibexpeak: Get rid of device_t	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-02-20	ibexpeak/thermal: set temperature target in early init.	Vladimir Serbinenko
2014-02-06	usbdebug: Drop obsolete code	Kyösti Mälkki
2013-11-25	Support for Ibexpeak southbridge	Vladimir Serbinenko
2013-06-13	Revert "Add support for Intel Ibex Peak (Mobile 5) southbridge"	Stefan Reinauer
2013-06-12	Add support for Intel Ibex Peak (Mobile 5) southbridge	Stefan Reinauer