coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-01	sb/intel/lynxpoint: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-04-05	Drop explicit NULL initializations from `device_operations`	Elyes HAOUAS
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-04-06	src: Use include <delay.h> when appropriate	Elyes HAOUAS
2019-03-21	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	Subrata Banik
2019-03-04	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki
2018-10-18	src/{sb/intel,mb/google/auron}: Don't use device_t	Elyes HAOUAS
2017-07-02	southbridge/intel/lynxpoint: Fix undefined behavior	Ryan Salsamendi
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-09-13	azalia: Shrink boilerplate	Vladimir Serbinenko
2014-07-08	southbridge: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2013-12-12	HDA: Enable Mini-HDA and fix up PCH-HDA init	Duncan Laurie
2013-11-25	lynxpoint: update azalia device ids	Aaron Durbin
2013-08-02	Remove unnecessary space characters.	Andrew Wu
2013-08-01	intel/lynxpoint: remove explicit pcie config accesses	Kyösti Mälkki
2013-03-14	lynxpoint: Update device IDs and clock gating setup	Duncan Laurie
2013-03-14	haswell: Add initial support for Haswell platforms	Aaron Durbin